[PATCH 3/4] clk: meson: g12a: fix swapped VID_PLL and VID_PLL_DIV clock ids for g12b
From: Ronald Claveau via B4 Relay
Date: Thu Oct 22 2026 - 17:58:38 EST
From: Ronald Claveau <linux-kernel-dev@xxxxxxxx>
In g12b onecell data table CLKID_VID_PLL points to g12a_vid_pll_div
and CLKID_VID_PLL_DIV points to g12a_vid_pll. So the ids are swapped.
Swap the ids back to their right entries.
Fixes: d43628e9bca6 ("clk: meson: g12a: Add support for G12B CPUB clocks")
Signed-off-by: Ronald Claveau <linux-kernel-dev@xxxxxxxx>
---
drivers/clk/meson/g12a.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 07105b2089c3..0a738c3c7fb5 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -4849,9 +4849,9 @@ static struct clk_hw *g12b_hw_clks[] = {
[CLKID_HDMI_PLL_OD] = &g12a_hdmi_pll_od.hw,
[CLKID_HDMI_PLL_OD2] = &g12a_hdmi_pll_od2.hw,
[CLKID_HDMI_PLL] = &g12a_hdmi_pll.hw,
- [CLKID_VID_PLL] = &g12a_vid_pll_div.hw,
+ [CLKID_VID_PLL] = &g12a_vid_pll.hw,
[CLKID_VID_PLL_SEL] = &g12a_vid_pll_sel.hw,
- [CLKID_VID_PLL_DIV] = &g12a_vid_pll.hw,
+ [CLKID_VID_PLL_DIV] = &g12a_vid_pll_div.hw,
[CLKID_VCLK_SEL] = &g12a_vclk_sel.hw,
[CLKID_VCLK2_SEL] = &g12a_vclk2_sel.hw,
[CLKID_VCLK_INPUT] = &g12a_vclk_input.hw,
--
2.43.0