[PATCH 1/2] dt-bindings: gpio: dwapb: add snps,native-both-edge

[Guohao Zhang]

Some DW APB GPIO IP instances are synthesized with the GPIO_INT_BOTH_EDGE
feature, which adds the GPIO_INT_BOTHEDGE register to latch both signal
edges in hardware. The capability belongs to the IP instance rather than
to the SoC, so describe it with a per-controller boolean property instead
of a build-time option, which could not express a per-controller
difference in a multiplatform kernel.

The property only describes the presence of the register. Controllers
that do not set it must not probe 0x68.

Signed-off-by: Guohao Zhang <guohao01.zhang@xxxxxxxxxxxx>
---
 .../devicetree/bindings/gpio/snps,dw-apb-gpio.yaml     | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
index 5506953..e229afe 100644
--- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
@@ -46,6 +46,16 @@ properties:
   resets:
     maxItems: 1
 
+  snps,native-both-edge:
+    description: |
+      The DW APB GPIO IP instance was synthesized with the GPIO_INT_BOTH_EDGE
+      feature, which allows detecting both signal edges in hardware through
+      the GPIO_INT_BOTHEDGE register. When set, IRQ_TYPE_EDGE_BOTH is
+      implemented with that register instead of toggling GPIO_INT_POLARITY in
+      software from the interrupt handler. Controllers without the feature
+      must not set this property, as the register does not exist there.
+    type: boolean
+
 patternProperties:
   "^gpio-(port|controller)@[0-9a-f]+$":
     type: object
-- 
2.34.1