Re: [PATCH v2] staging: fbtft: fb_upd161704: Replace udelay() with usleep_range()

[Julia Lawall]

> On 25 Oct 2026, at 05:53, Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx> wrote:
> 
> From 778030aa9291e3a7d40ffb03b19e6877041cddc8 Mon Sep 17 00:00:00 2001
> From: Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx>
> Date: Sat, 24 Oct 2026 12:02:25 +0100
> Subject: [PATCH v2] staging: fbtft: fb_upd161704: Replace udelay() with
> usleep_range()

This is still not correct. All of this From, Date information should not be in the message. And there should be a log message describing the change, not just a description in the subject line. Please look at the patches sent by others and reread the tutorial to see what steps you have done wrong.


> 
> Signed-off-by: Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx>
> ---
> v2:
> - Send patch inline in the email body rather than as an attachment.
> - No functional changes to the code diff itself.
> 
> v1:
> drivers/staging/fbtft/fb_upd161704.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/staging/fbtft/fb_upd161704.c
> b/drivers/staging/fbtft/fb_upd161704.c
> index 7288140e7..94ae5bbf0 100644
> --- a/drivers/staging/fbtft/fb_upd161704.c
> +++ b/drivers/staging/fbtft/fb_upd161704.c
> @@ -32,27 +32,27 @@ static int init_display(struct fbtft_par *par)
> 
>        /* oscillator start */
>        write_reg(par, 0x003A, 0x0001); /*Oscillator 0: stop, 1: operation */
> -       udelay(100);
> +       usleep_range(100, 150);

You need to also check the archives to see whether the change is welcome. Greg tends to reject this change unless you have tested it because you are changing the behavior of the driver.  Without testing you don’t know if you have chosen the correct range.

Julia



> 
>        /* y-setting */
>        write_reg(par, 0x0024, 0x007B); /* amplitude setting */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0025, 0x003B); /* amplitude setting */
>        write_reg(par, 0x0026, 0x0034); /* amplitude setting */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0027, 0x0004); /* amplitude setting */
>        write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */
>        write_reg(par, 0x0061, 0x001C); /* adjustment V10 positive polarity */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0062, 0x002C); /* adjustment V9 negative polarity */
>        write_reg(par, 0x0063, 0x0022); /* adjustment V34 positive polarity */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0064, 0x0027); /* adjustment V31 negative polarity */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0065, 0x0014); /* adjustment V61 negative polarity */
> -       udelay(10);
> +       usleep_range(10, 20);
>        write_reg(par, 0x0066, 0x0010); /* adjustment V61 negative polarity */
> 
>        /* Basical clock for 1 line (BASECOUNT[7:0]) number specified */
> @@ -60,7 +60,7 @@ static int init_display(struct fbtft_par *par)
> 
>        /* Power supply setting */
>        write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */
> -       udelay(200);
> +       usleep_range(200, 250);
>        write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */
>        write_reg(par, 0x001B, 0x0023); /* DC/DC rising setting */
>        write_reg(par, 0x001C, 0x0C01); /* Regulator voltage setting */
> --
> 2.34.1