Re: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Add SPI3 QUP core bandwidth OPP

[Viken Dadhaniya]

On 10/26/2026 6:19 PM, Konrad Dybcio wrote:
> On 10/25/26 2:43 PM, Viken Dadhaniya wrote:
>> Short SPI transfers are sensitive to the bandwidth available on the QUP
>> core interconnect path. An insufficient vote delays Serial Engine
>> register and FIFO accesses, increasing command-dispatch latency.
>>
>> Add a dedicated SPI3 OPP table with the valid 75 MHz and 100 MHz
>> source-clock and RPMh power-domain OPPs. Add a 100000 kBps average and
>> peak vote for the QUP core interconnect path. This improves MCP2518FD CAN
>> payload throughput by approximately 38%.
>>
>> Limit the vote to SPI3 on RB3Gen2, where it serves the MCP2518FD CAN
>> controller and its frequent short SPI transfers. Other QUP/SPI instances
>> do not require this vote, so avoid raising their interconnect bandwidth
>> unnecessarily.
> 
> You can solve the general problem OR you can do what this and
> create more work down the line. What if I connect a MCP2518FD
> on SPI4? SPI5? SPI6?
> 
> Konrad

I understand the concern about supporting this on other SPI instances.
Moving the MCP2518FD would require a board wiring change and corresponding
DT updates, which could include its bandwidth requirement. On RB3Gen2,
it is connected to SPI3, so this patch scopes the vote to that instance.
Other tested SPI clients do not have KPI issues, which is why I kept
this change specific to the current board configuration.