[PATCH v2 2/3] ASoC: loongson: Use FIELD_PREP() for register fields

[phucduc . bui]

From: bui duc phuc <phucduc.bui@xxxxxxxxx>

Use FIELD_PREP() to set the bit fields in the I2S configuration
registers instead of open-coded shifts.

This makes the register field assignments clearer and consistent
between revision 0 and revision 1.

Signed-off-by: bui duc phuc <phucduc.bui@xxxxxxxxx>
---
 sound/soc/loongson/loongson_i2s.c | 11 ++++++-----
 sound/soc/loongson/loongson_i2s.h |  5 +++++
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/sound/soc/loongson/loongson_i2s.c b/sound/soc/loongson/loongson_i2s.c
index aebea177e7e0..0d5278203024 100644
--- a/sound/soc/loongson/loongson_i2s.c
+++ b/sound/soc/loongson/loongson_i2s.c
@@ -80,10 +80,10 @@ static int loongson_i2s_hw_params(struct snd_pcm_substream *substream,
 		mclk_ratio = DIV_ROUND_CLOSEST(clk_rate, (sysclk * 2)) - 1;
 
 		/* According to 2k1000LA user manual, set bits == depth */
-		val |= (bits << 24);
-		val |= (bits << 16);
-		val |= (bclk_ratio << 8);
-		val |= mclk_ratio;
+		val = FIELD_PREP(LS_I2S_CFG_LR_LEN_MASK, bits) |
+		      FIELD_PREP(LS_I2S_CFG_TX_RES_DEPTH_MASK, bits) |
+		      FIELD_PREP(LS_I2S_CFG_BCLK_RATIO_MASK, bclk_ratio) |
+		      FIELD_PREP(LS_I2S_CFG_MCLK_RATIO_MASK, mclk_ratio);
 		regmap_write(i2s->regmap, LS_I2S_CFG, val);
 
 		break;
@@ -106,7 +106,8 @@ static int loongson_i2s_hw_params(struct snd_pcm_substream *substream,
 		}
 		regmap_update_bits(i2s->regmap, LS_I2S_CFG, mask, val);
 
-		val = (mclk_ratio_frac << 16) | mclk_ratio;
+		val = FIELD_PREP(LS_I2S_CFG1_MCLK_RATIO_FRAC_MASK, mclk_ratio_frac) |
+		      FIELD_PREP(LS_I2S_CFG1_MCLK_RATIO_MASK, mclk_ratio);
 		regmap_write(i2s->regmap, LS_I2S_CFG1, val);
 
 		break;
diff --git a/sound/soc/loongson/loongson_i2s.h b/sound/soc/loongson/loongson_i2s.h
index 457d90e3d5b6..0c280e9b7505 100644
--- a/sound/soc/loongson/loongson_i2s.h
+++ b/sound/soc/loongson/loongson_i2s.h
@@ -45,6 +45,11 @@
 #define LS_I2S_CFG_TX_RES_DEPTH_MASK	GENMASK(23, 16)
 #define LS_I2S_CFG_BCLK_RATIO_MASK	GENMASK(15, 8)
 #define LS_I2S_CFG_RX_RES_DEPTH_MASK	GENMASK(7, 0)		/* rev 1 */
+#define LS_I2S_CFG_MCLK_RATIO_MASK	GENMASK(7, 0)		/* rev 0 */
+
+/* Loongson I2S Config 1 Register (rev 1) */
+#define LS_I2S_CFG1_MCLK_RATIO_FRAC_MASK	GENMASK(31, 16)
+#define LS_I2S_CFG1_MCLK_RATIO_MASK		GENMASK(15, 0)
 
 #define LS_I2S_DRVNAME		"loongson-i2s"
 
-- 
2.43.0