[PATCH 0/6] Tegra264 GB10B boards the bus
From: Mikko Perttunen
Date: Wed Oct 28 2026 - 23:35:06 EST
The integrated GB10B GPU on the Tegra264 SoC is connected to an internal
PCIe bus. However, it won't enumerate on the bus unless its BPMP-managed
power domain is enabled.
This series uses the PCI pwrctrl framework to allow enabling the power
domain before enumerating the bus, and adds the device tree changes
necessary to make the GPU appear.
Patch 1 adds the ats-supported property to the Tegra264 PCI controller's
device tree bindings.
Patches 2 and 3 enable the pwrctrl framework to detect device tree nodes
with a power-domains property as needing a pwrctrl device, and add the
GB10B's PCI IDs to the match table.
Patch 4 updates the Tegra264 PCI controller driver to call into
pwrctrl to power up the endpoint devices.
Patches 5 and 6 describe the GB10B in the Tegra264 device tree and
enable the PCI controller (and ATS support) in the SoC device tree since
it is chip-internal.
All patches are independent of each other (apart from patch 6 causing
device tree warnings unless the binding patch is applied).
Thank you,
Mikko
Signed-off-by: Mikko Perttunen <mperttunen@xxxxxxxxxx>
---
Mikko Perttunen (6):
dt-bindings: PCI: tegra264: Allow the ats-supported property
PCI/pwrctrl: Enable pwrctrl for devices powered by a power domain
PCI/pwrctrl: Add the Tegra264 iGPU to the generic match table
PCI: tegra264: Power endpoint devices before enumeration
arm64: tegra: Add node for the GB10B GPU on Tegra264
arm64: tegra: Enable and mark the Tegra264 GPU PCIe controller as ATS supported
.../bindings/pci/nvidia,tegra264-pcie.yaml | 5 +++++
arch/arm64/boot/dts/nvidia/tegra264.dtsi | 8 +++++++-
drivers/pci/controller/Kconfig | 1 +
drivers/pci/controller/pcie-tegra264.c | 22 ++++++++++++++++++++--
drivers/pci/pwrctrl/core.c | 7 +++++--
drivers/pci/pwrctrl/generic.c | 4 ++++
6 files changed, 42 insertions(+), 5 deletions(-)
---
base-commit: 8f7df005a7564bd7ffa75da9c3085d5b996f1e16
change-id: 20261021-b4-t264-igpu-pci-8b94cf0b91ee