[PATCH v12 09/11] MAINTAINERS: add RISC-V SSE maintainers and file coverage

[Zhanpeng Zhang]

Add the RISC-V SSE maintainers and cover the architecture entry,
firmware driver, PMU documentation and selftests in a separate patch,
as requested by Himanshu Chauhan. Also add coverage for RISC-V firmware
drivers and the architecture selftests.

Link: https://lore.kernel.org/r/as79MHtNYd-VbUug@xxxxxxxxxxxxxxxxxxxxxxxxxxx/

Signed-off-by: Zhanpeng Zhang <zhangzhanpeng.jasper@xxxxxxxxxxxxx>
---
 MAINTAINERS | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 65e8a4b5c90..f275e9d4847 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -23506,6 +23506,7 @@ C:	irc://irc.libera.chat/riscv
 P:	Documentation/arch/riscv/patch-acceptance.rst
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
 F:	arch/riscv/
+F:	tools/testing/selftests/riscv/
 N:	riscv
 K:	riscv
 
@@ -23518,6 +23519,13 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git
 F:	Documentation/devicetree/bindings/iommu/riscv,iommu.yaml
 F:	drivers/iommu/riscv/
 
+RISC-V FIRMWARE DRIVERS
+M:	Conor Dooley <conor@xxxxxxxxxx>
+L:	linux-riscv@xxxxxxxxxxxxxxxxxxx
+S:	Maintained
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git
+F:	drivers/firmware/riscv/
+
 RISC-V MICROCHIP SUPPORT
 M:	Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
 M:	Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx>
@@ -23573,6 +23581,7 @@ M:	Atish Patra <atish.patra@xxxxxxxxx>
 R:	Anup Patel <anup@xxxxxxxxxxxxxx>
 L:	linux-riscv@xxxxxxxxxxxxxxxxxxx
 S:	Supported
+F:	Documentation/arch/riscv/pmu-sse.rst
 F:	drivers/perf/riscv_pmu.c
 F:	drivers/perf/riscv_pmu_legacy.c
 F:	drivers/perf/riscv_pmu_sbi.c
@@ -23612,6 +23621,19 @@ F:	arch/riscv/boot/dts/spacemit/
 N:	spacemit
 K:	spacemit
 
+RISC-V SUPERVISOR SOFTWARE EVENTS
+M:	Zhanpeng Zhang <zhangzhanpeng.jasper@xxxxxxxxxxxxx>
+M:	Himanshu Chauhan <himanshu.chauhan@xxxxxxxxxxxxxxxx>
+R:	Yunhui Cui <cuiyunhui@xxxxxxxxxxxxx>
+L:	linux-riscv@xxxxxxxxxxxxxxxxxxx
+S:	Maintained
+F:	arch/riscv/include/asm/sse.h
+F:	arch/riscv/kernel/sbi_sse.c
+F:	arch/riscv/kernel/sbi_sse_entry.S
+F:	drivers/firmware/riscv/riscv_sbi_sse.c
+F:	include/linux/riscv_sbi_sse.h
+F:	tools/testing/selftests/riscv/sse/
+
 RISC-V TENSTORRENT SoC SUPPORT
 M:	Drew Fustini <dfustini@xxxxxxxxxxxxxxxxxxx>
 M:	Joel Stanley <jms@xxxxxxxxxxxxxxxxxxx>
-- 
2.50.1 (Apple Git-155)