[PATCH] PCI: dwc: tegra194: Clear event counter masks before programming

[Hans Zhang]

When programming the RAS-DES event counter control register, the code only
cleared the event-selection field before OR-ing in the new group, event,
and enable values. This leaves stale bits in the group-select and enable
fields from prior writes.

Clear all three field masks before programming the register so that stale
bits are not preserved across updates.

No functional change intended beyond ensuring the register is rewritten
without carrying over previous field values.

Signed-off-by: Hans Zhang <18255117159@xxxxxxx>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 26e2ac5c5869..7a0aca54667c 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -623,7 +623,9 @@ static inline u32 event_counter_prog(struct tegra_pcie_dw *pcie, u32 event)
 
 	val = dw_pcie_readl_dbi(&pcie->pci, pcie->ras_des_cap +
 				RAS_DES_EVENT_COUNTER_CONTROL);
-	val &= ~EVENT_COUNTER_EVENT_SEL_MASK;
+	val &= ~(EVENT_COUNTER_EVENT_SEL_MASK |
+		 EVENT_COUNTER_GROUP_SEL_MASK |
+		 EVENT_COUNTER_ENABLE_MASK);
 	val |= FIELD_PREP(EVENT_COUNTER_GROUP_SEL_MASK, EVENT_COUNTER_GROUP_5);
 	val |= FIELD_PREP(EVENT_COUNTER_EVENT_SEL_MASK, event);
 	val |= FIELD_PREP(EVENT_COUNTER_ENABLE_MASK, EVENT_COUNTER_ENABLE_ALL);

base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
-- 
2.43.0