Re: [PATCH v2 09/10] PCI: tegra194: Balance core monitor clock on failures

[Manikanta Maddireddy]

On 21/10/26 9:13 pm, Frank Li wrote:
> On Wed, Oct 21, 2026 at 11:43:48AM +0530, Manikanta Maddireddy wrote:
> > tegra_pcie_dw_host_init() enables core_clk_m, but failure paths that leave
> > after the host init callback can unconfigure the controller without
> > disabling that clock. The enable error is also only logged, so later
> > cleanup can try to disable a clock that was never enabled.
> >
> > Track the monitor clock state, return enable failures, and use a common
> > helper on retry, remove, suspend, shutdown and host-init failure paths so
> > the clock is disabled exactly when it was enabled.
>
> Feel like checking core_clk_m_enabled for clock is not good desgin. Do you
> disable clock when linkdown?
>
> Frank

Hi Frank,

Link down is treated as error and monitor clock is not disabled during 
linkdown.

I created this patch to address the AI bot review comments. But, I 
checked our internal resources and identify the correct sequence of 
enabling monitor clock. I will send new patchset with details 
explanation in commit message and new fixed sequence for monitor clock.

- Manikanta

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