[PATCH 1/2] PCI/PM: Disable bridge D3 on Lenovo ThinkCentre M90n-1

[Mario Limonciello]

On the Lenovo ThinkCentre M90n-1 (board 314D), suspending the empty
Root Port 9 turns off a clock needed by the onboard RTL8168 behind
Root Port 12.  The NIC becomes inaccessible and r8169 fails to probe
with "Unable to change power state from D3cold to D0".

The RP09.PXP_._OFF method gates PCH SRC clock 1, which also supplies
the NIC behind Root Port 12.  Keeping Root Port 9 in D0 preserves
that clock and allows the NIC to probe.  Commit 4d4c10f763d7 ("PCI:
Explicitly put devices into D0 when initializing") exposed the firmware
bug on every boot by ensuring that the first runtime suspend executes
the power resource's _OFF method.

Add the board to bridge_d3_blacklist to prevent bridge D3 transitions.
Check the blacklist before platform_pci_bridge_d3(), since ACPI allows
D3 on the affected hotplug port and would otherwise bypass the quirk.

Fixes: 4d4c10f763d7 ("PCI: Explicitly put devices into D0 when initializing")
Reported-by: Joshua Perry <josh@xxxxxxxx>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=222179
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Mario Limonciello <superm1@xxxxxxxxxx>
---
 drivers/pci/pci.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7c6f2aba81443..17ec7f065682d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3028,6 +3028,17 @@ static const struct dmi_system_id bridge_d3_blacklist[] = {
 			DMI_MATCH(DMI_BOARD_VERSION, "95.33"),
 		},
 	},
+	{
+		/*
+		 * Suspending Root Port 9 gates a clock used by the onboard
+		 * RTL8168 behind Root Port 12, making the NIC inaccessible.
+		 */
+		.ident = "Lenovo ThinkCentre M90n-1",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
+			DMI_MATCH(DMI_BOARD_NAME, "314D"),
+		},
+	},
 #endif
 	{ }
 };
@@ -3073,6 +3084,10 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (bridge->is_thunderbolt)
 			return true;
 
+		/* Firmware D3 support does not override known platform bugs. */
+		if (dmi_check_system(bridge_d3_blacklist))
+			return false;
+
 		/* Platform might know better if the bridge supports D3 */
 		if (platform_pci_bridge_d3(bridge))
 			return true;
@@ -3085,9 +3100,6 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
 		if (IS_ENABLED(CONFIG_X86) && bridge->is_pciehp)
 			return false;
 
-		if (dmi_check_system(bridge_d3_blacklist))
-			return false;
-
 		/*
 		 * Out of caution, we only allow PCIe ports from 2015 or newer
 		 * into D3 on x86.

-- 
2.53.0