[PATCH 2/8] dt-bindings: riscv: cpus: add OpenHW Group CVA6 compatibles
From: marouene . boubakri
Date: Mon Nov 02 2026 - 09:45:32 EST
From: Marouene Boubakri <marouene.boubakri@xxxxxxxxxxx>
Add the compatible strings for the two configurations of the OpenHW
Group CVA6 application class core: the 64-bit cv64a6 and the 32-bit
cv32a6.
Signed-off-by: Marouene Boubakri <marouene.boubakri@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 0da219ae67..81c3a6cf91 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -49,6 +49,8 @@ properties:
- andestech,ax45mp
- canaan,k210
- nuclei,ux900
+ - openhwgroup,cv32a6
+ - openhwgroup,cv64a6
- sifive,bullet0
- sifive,e5
- sifive,e7
--
2.43.0