Re: [PATCH 1/4] dt-bindings: interrupt-controller: add Mobileye EyeQ5 PCIe MSI controller

[Gregory CLEMENT]

Krzysztof Kozlowski <krzk@xxxxxxxxxx> writes:

>> +  num-vectors:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description: Number of MSI vectors that the port supports.
>> +    minimum: 1
>> +    maximum: 4
>
> So your SoC has multiple blocks with different number of vectors?

No it has always the same number of vector, so you are right I will
remove it.

>
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - interrupt-controller
>> +  - '#interrupt-cells'
>> +  - msi-controller
>> +  - '#msi-cells'
>> +  - memory-region
>> +  - num-vectors
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/mips-gic.h>
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>
> From here...
>
>> +    / {
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
>> +
>> +        gic: interrupt-controller {
>> +            compatible = "mti,cpu-interrupt-controller";
>> +            interrupt-controller;
>> +            #interrupt-cells = <3>;
>> +        };
>> +
>> +        reserved-memory {
>> +            #address-cells = <2>;
>> +            #size-cells = <2>;
>> +            ranges;
>> +
>> +            pci0_msi_reserved: pci0-msi@806000000 {
>> +                reg = <0x8 0x06000000 0x0 0x100000>;
>> +            };
>> +        };
>> +
>
> .. to here drop everything. This causes warnings.
>
>> +        soc {
>> +            #address-cells = <2>;
>> +            #size-cells = <2>;
>> +            ranges;
>> +
>> +            msi0: msi-controller@5840000 {
>
> Drop unused DT label.

OK I was too close to my DT for no real reason. I will simplify the
example.

Thanks,

Gregory

>
>> +                compatible = "mobileye,eyeq5-msi";
>> +                reg = <0x0 0x05840000 0x0 0x10>,
>> +                      <0x0 0x05840040 0x0 0x20>;
>> +                label = "port0-msi";
>> +                interrupt-parent = <&gic>;
>> +                interrupts = <GIC_SHARED 7 IRQ_TYPE_LEVEL_HIGH>;
>> +                interrupt-controller;
>> +                #interrupt-cells = <1>;
>> +                msi-controller;
>> +                #msi-cells = <0>;
>> +                memory-region = <&pci0_msi_reserved>;
>> +                num-vectors = <4>;
>> +            };
>> +        };
>> +    };
>> 
>> -- 
>> 2.53.0
>> 

-- 
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com