Re: [PATCH v7 1/2] dt-bindings: usb: add Altera Agilex5 DWC3 controller
From: Rob Herring
Date: Mon Nov 02 2026 - 14:36:01 EST
On Fri, Sep 11, 2026 at 05:04:52PM +0800, adrian.ho.yin.ng@xxxxxxxxxx wrote:
> From: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>
>
> Add a binding for the Altera Agilex5 SoC integration of the Synopsys DWC3
> USB controller (compatible "altr,agilex5-dwc3"), covering clocks, resets,
> PHYs, and optional IOMMU support.
>
> Clock names follow the snps,dwc3.yaml example order (bus_early, ref,
> suspend). Reset names use core/ecc. On this SoC ref and suspend are the
> same hardware source, so the example reuses AGILEX5_USB31_SUSPEND_CLK.
>
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
> ---
> .../bindings/usb/altr,agilex5-dwc3.yaml | 112 ++++++++++++++++++
> 1 file changed, 112 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/altr,agilex5-dwc3.yaml
Applied for 7.4 as the .dts user is already applied and Greg seems a bit
behind.
Rob