[PATCH v3 4/9] ARM: dts: omap: dm816x: refactor and align MMC node
From: Ettore Chimenti
Date: Mon Nov 02 2026 - 14:58:16 EST
From: Andrew Goodbody <andrew.goodbody@xxxxxxxxxx>
Update the MMC node in the TI Sitara DM816x device tree to align with
the structure used in other similar SoCs. The changes include
refactoring the node to better describe the target module and its
sub-nodes. Also removing deprecated MMC `ti,hwmods` property in favour of
ti-sysc implementation.
Signed-off-by: Andrew Goodbody <andrew.goodbody@xxxxxxxxxx>
Signed-off-by: Ettore Chimenti <ettore.chimenti@xxxxxxxxxx>
---
arch/arm/boot/dts/ti/omap/dm816x.dtsi | 34 +++++++++++++++++++++++++++-------
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
index fc124f9ecfa1..1e8d225dfb2c 100644
--- a/arch/arm/boot/dts/ti/omap/dm816x.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dm816x.dtsi
@@ -423,13 +423,33 @@ &edma 20 0 &edma 21 0
"tx2", "rx2", "tx3", "rx3";
};
- mmc1: mmc@48060000 {
- compatible = "ti,omap4-hsmmc";
- reg = <0x48060000 0x11000>;
- ti,hwmods = "mmc1";
- interrupts = <64>;
- dmas = <&edma 24 0 &edma 25 0>;
- dma-names = "tx", "rx";
+ mmc1_target: target-module@48060000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x48060000 0x4>,
+ <0x48060110 0x4>,
+ <0x48060114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&alwon_clkctrl DM816_MMC1_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48060000 0x11000>;
+
+ mmc1: mmc@0 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x0 0x11000>;
+ interrupts = <64>;
+ dmas = <&edma 24 0 &edma 25 0>;
+ dma-names = "tx", "rx";
+ };
};
timer1_target: target-module@4802e000 {
--
2.56.0