[PATCH 5/7] gpu: nova-core: falcon: allow DMEM DMA transfers to request tagging

[Alexandre Courbot]

Add a tag flag to FalconMem::Dmem and set DMATRFCMD's DMTAG bit from it.

This is needed for the r000 load-and-execute event which specifies
whether DMEM should be tagged or not.

No functional change intended.

Signed-off-by: Alexandre Courbot <acourbot@xxxxxxxxxx>
---
 drivers/gpu/nova-core/falcon.rs | 20 +++++++++++++-------
 drivers/gpu/nova-core/regs.rs   |  2 +-
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 1bceb38c33c6..f48f2eabab0f 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -131,8 +131,9 @@ pub(crate) enum FalconMem {
     /// Non-Secure Instruction Memory.
     #[expect(unused)]
     ImemNonSecure,
-    /// Data Memory.
-    Dmem,
+    /// Data Memory. If `tag` is set, a transfer into DMEM also tags each block with its source
+    /// offset, which is then the DMEM virtual address of the image.
+    Dmem { tag: bool },
 }
 
 bounded_enum! {
@@ -529,9 +530,9 @@ fn dma_wr(
         // code addresses in the firmware (and the boot vector) are virtual.
         //
         // For DMEM, the start offset is folded into the DMA address.
-        let (src_start, dma_start) = match target_mem {
-            FalconMem::ImemSecure | FalconMem::ImemNonSecure => (load_offsets.src_start, 0),
-            FalconMem::Dmem => (0, usize::from_safe_cast(load_offsets.src_start)),
+        let (src_start, dma_start, tag_dmem) = match target_mem {
+            FalconMem::ImemSecure | FalconMem::ImemNonSecure => (load_offsets.src_start, 0, false),
+            FalconMem::Dmem { tag } => (0, usize::from_safe_cast(load_offsets.src_start), tag),
         };
 
         let dma_address = {
@@ -568,7 +569,8 @@ fn dma_wr(
 
         let cmd = regs::NV_PFALCON_FALCON_DMATRFCMD::zeroed()
             .with_size(DmaTrfCmdSize::Size256B)
-            .with_falcon_mem(target_mem);
+            .with_falcon_mem(target_mem)
+            .with_set_dmtag(tag_dmem);
 
         for pos in (0..num_transfers).map(|i| i * DMA_LEN) {
             // Perform a transfer of size `DMA_LEN`.
@@ -625,7 +627,11 @@ fn dma_load<F: FalconFirmware<Target = E> + FalconDmaLoadable>(&self, fw: &F) ->
             });
 
         self.dma_wr(&dma_obj, FalconMem::ImemSecure, fw.imem_sec_load_params())?;
-        self.dma_wr(&dma_obj, FalconMem::Dmem, fw.dmem_load_params())?;
+        self.dma_wr(
+            &dma_obj,
+            FalconMem::Dmem { tag: false },
+            fw.dmem_load_params(),
+        )?;
 
         self.hal.program_brom(self, &fw.brom_params());
 
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index b7070282d692..cba080ccaab2 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -323,7 +323,7 @@ pub(crate) fn mem_scrubbing_done(self) -> bool {
 impl NV_PFALCON_FALCON_DMATRFCMD {
     /// Programs the `imem` and `sec` fields for the given FalconMem
     pub(crate) fn with_falcon_mem(self, mem: FalconMem) -> Self {
-        let this = self.with_imem(mem != FalconMem::Dmem);
+        let this = self.with_imem(!matches!(mem, FalconMem::Dmem { .. }));
 
         match mem {
             FalconMem::ImemSecure => this.with_const_sec::<1>(),

-- 
2.56.0