[PATCH] PCI: keystone: drop host bridge reference in ks_pcie_quirk()

[Wentao Liang]

pci_get_host_bridge_device() takes a kobject reference on the host
bridge device.  ks_pcie_quirk() returns without releasing it on every
path after the lookup, including the AM654 PG1.0 path that only limits
the MRRS, so the reference is leaked once for each enabled downstream
device below an AM654 root complex.

Move the AM654 handling out of the enclosing conditional and release
the reference through a single cleanup label.

Fixes: 86f271f22bbb ("PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0)")
Cc: stable@xxxxxxxxxxxxxxx
Assisted-by: DeepSeek-V4.1-Flash and OpenAI Codex
Signed-off-by: Wentao Liang <vulab@xxxxxxxxxxx>
---
 drivers/pci/controller/dwc/pci-keystone.c | 45 +++++++++++++----------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index edfbc32904cd..0c46887de0d5 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -579,26 +579,33 @@ static void ks_pcie_quirk(struct pci_dev *dev)
 	 * when MRRS is set to more than 128 bytes. Force the MRRS to
 	 * 128 bytes in all downstream devices.
 	 */
-	if (pci_match_id(am6_pci_devids, bridge)) {
-		bridge_dev = pci_get_host_bridge_device(dev);
-		if (!bridge_dev || !bridge_dev->parent)
-			return;
-
-		ks_pcie = dev_get_drvdata(bridge_dev->parent);
-		if (!ks_pcie)
-			return;
-
-		val = ks_pcie_app_readl(ks_pcie, PID);
-		val &= RTL;
-		val >>= RTL_SHIFT;
-		if (val != AM6_PCI_PG1_RTL_VER)
-			return;
-
-		if (pcie_get_readrq(dev) > 128) {
-			dev_info(&dev->dev, "limiting MRRS to 128 bytes\n");
-			pcie_set_readrq(dev, 128);
-		}
+	if (!pci_match_id(am6_pci_devids, bridge))
+		return;
+
+	bridge_dev = pci_get_host_bridge_device(dev);
+	if (!bridge_dev)
+		return;
+
+	if (!bridge_dev->parent)
+		goto put_bridge;
+
+	ks_pcie = dev_get_drvdata(bridge_dev->parent);
+	if (!ks_pcie)
+		goto put_bridge;
+
+	val = ks_pcie_app_readl(ks_pcie, PID);
+	val &= RTL;
+	val >>= RTL_SHIFT;
+	if (val != AM6_PCI_PG1_RTL_VER)
+		goto put_bridge;
+
+	if (pcie_get_readrq(dev) > 128) {
+		dev_info(&dev->dev, "limiting MRRS to 128 bytes\n");
+		pcie_set_readrq(dev, 128);
 	}
+
+put_bridge:
+	pci_put_host_bridge_device(bridge_dev);
 }
 DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, ks_pcie_quirk);
 
-- 
2.34.1