Re: [PATCH 2/3] mmc: mmci: stm32: do not use NEGEDGE in HS200 mode

[mateusz . nowicki]

Hello Christophe,

> No, it is not what it is written in the RM. If clkdiv is equal to 0, 
> NEGEDGE has no effect.
> NEGEDGE has an effect only when clkdiv > 0, so it can be used with 
> HS200.

You're right, thanks for the correction. I read the NA in table 268 as
"not allowed in HS200", but it is only there because CLKDIV is 0 in that
configuration. I'll drop this patch.

> On ST downstream Linux Kernel, you can find following patch not already 
> upstream:
> mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC 
> (Commit ca3b1cf)
> By applying previous downstream patch + patch 3 of this patchset + 
> using  original slew rate that was upstream on
> this board (slew rate set to 2 for the clock IO, 1 for the others IOs), 
> HS200 should run on a ST MP25 DK board at 100 MHz.

Thanks for the pointer, that was the missing piece. I went back to the
DK and tested it with the SDMMC2 kernel clock at 200 MHz, so HS200 runs
at 100 MHz like in mainline. Without ca3b1cf every write test failed,
no matter whether NEGEDGE was set or which pin group I used. With
ca3b1cf all runs were clean, with pins_a as well as with pins_b. I also
checked 150 MHz (no divider, delay block in use), and it works with
both pin groups too.

So NEGEDGE was never the problem, it was the delay block running at
100 MHz. I'll include ca3b1cf and 01d3cac in v2, with you as the author.

One more thing about the pins. I added the pins_b groups (faster slew
rate) to the DK device tree in 7.4 because pins_a seemed to corrupt data
in HS200 at 100 MHz. Looking at it now, that was the same delay block
issue. Would you like me to send a patch that switches the DK back to
pins_a and drops pins_b?

> This patch breaks also MP13 SoC that is supporting HS200.

Understood, sorry about that.

Regards,
Mateusz