Re: [PATCH v4 0/7] alpha/perf: add ProfileMe sampling

[Matt Turner]

On Mon, Nov 2, 2026 at 10:29 PM Ian Rogers <irogers@xxxxxxxxxx> wrote:
> [...] I have a suggestion about the rest of the data, which is
> currently only reachable through PERF_SAMPLE_RAW. Raising it now since
> it's easier to shape before the uapi lands.

Thanks, Ian. This is incredibly valuable feedback. I really appreciate
you taking the time to write this!

I've done all of these in v5, as patches 8 to 11.

> The PCTR1 window count looks like a natural fit for
> PERF_SAMPLE_WEIGHT_STRUCT.

Patch 8 does it as you suggested, and only when the sample's IP is the
profiled instruction. On the ES47 the weight matched PCTR1 in the raw
record in every exact sample, and was 0 in the PALmode ones.

> Similarly, if any I_STAT trap types identify a memory event, a DTB
> miss on a load or store say, setting PERF_SAMPLE_DATA_SRC (mem_op,
> mem_dtlb) for those samples would make them visible to the memory
> sort keys.

Patch 9. The DTB miss trap types map to an L1 mem_dtlb miss. I_STAT
does not say whether it was a load or a store, so mem_op comes from the
opcode. A test touching one word per page got LOAD and STORE as
expected.

One thing turned up while testing: an instruction killed before it was
mapped can have TRP and MIS set, even when it is not a branch. So
those bits are ignored when PM_KILLED_BM is set.

> The remaining status bits (retired/killed, mispredict, trap) don't
> have a generic home, but they'd make useful filters

Patch 10 adds retired, mispredict and trapped in config1. As with SPE's
event_filter, a sample must match every bit that is set. Dropped
samples still go through perf_event_account_interrupt().

> Since PEBS and IBS op only sample retired instructions, it may even
> make sense for precise_ip to imply retired-only, leaving the profileme
> bit for the unfiltered view.

Patch 11, kept separate since it changes the default. On a loop with a
randomly mispredicted branch, 19% of the unfiltered samples were killed
before map and another 48% later; with cycles:p both are 0%. The cost
is that DTB miss samples are of aborted instructions, so seeing their
data source needs cpu/cycles,trapped/p.

Thanks,
Matt