Re: [PATCH 1/2] dt-bindings: mmc: sdhci-msm: Document bindings for Nord SDCC
From: Krzysztof Kozlowski
Date: Wed Nov 04 2026 - 08:58:28 EST
On Mon, Nov 02, 2026 at 07:33:41PM +0530, Anjana Hari wrote:
> Add Device Tree binding for the Nord SDHCI variant of the Qualcomm
> sdhci-msm controller, where platform resources are managed by firmware
> through the SCMI power protocol rather than being directly accessible
> to Linux.
A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23
>
> Unlike existing sdhci-msm variants, this binding does not require
> clock, interconnect, reset, or regulator properties. Instead, platform
> resource control is abstracted behind two logical power domains:
>
> - "power": controls the SDCC rail power state. The kernel requests
> power-on and power-off transitions via the runtime PM framework;
> these are forwarded to firmware as SCMI power-state messages.
>
> - "perf": exposes the supported clock frequencies as OPPs populated
> dynamically by the SCMI perf domain driver at probe time via the
> SCMI performance protocol. The driver selects operating points via
> dev_pm_opp_find_freq_floor() and dev_pm_opp_set_opp().
>
> Both domains must be listed under power-domains with their names
> declared in power-domain-names.
>
> The compatible string "qcom,nord-sdhci" selects this variant at probe
> time and causes the driver to attach the two power domains via
> dev_pm_domain_attach_list() with PD_FLAG_DEV_LINK_ON, ensuring correct
> suspend/resume ordering between the SDCC controller and the firmware
> power domain devices.
Do not describe driver. How is it exactly relevant here for the hardware
description?
>
> Signed-off-by: Anjana Hari <anjana.hari@xxxxxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/mmc/qcom,nord-sdhci.yaml | 89 ++++++++++++++++++++++
> 1 file changed, 89 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/qcom,nord-sdhci.yaml b/Documentation/devicetree/bindings/mmc/qcom,nord-sdhci.yaml
> new file mode 100644
> index 000000000000..c512628617b0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/qcom,nord-sdhci.yaml
> @@ -0,0 +1,89 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mmc/qcom,nord-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Nord SDHCI Controller
> +
> +maintainers:
> + - Anjana Hari <anjana.hari@xxxxxxxxxxxxxxxx>
> +
> +description:
> + SDHCI (SD Host Controller Interface) present on Qualcomm Nord SoC.
> + Clock and power resources are managed by firmware through an SCMI
> + server, so no clock entries are required in the device tree node.
> +
> +properties:
> + compatible:
> + const: qcom,nord-sdhci
> +
> + reg:
> + maxItems: 1
> +
> + reg-names:
> + items:
> + - const: hc
Where is CQHCI?
> +
> + interrupts:
> + maxItems: 2
> +
> + interrupt-names:
> + items:
> + - const: hc_irq
> + - const: pwr_irq
> +
> + iommus:
> + maxItems: 1
> + description: phandle to the apps SMMU node with SID mask.
Drop description
> +
> + dma-coherent: true
> +
> + power-domains:
> + maxItems: 2
> +
> + power-domain-names:
> + items:
> + - const: power
> + - const: perf
Best regards,
Krzysztof