回复：[PATCH 1/3] nvme: Add adaptive PCIe link rate switching function

[廖煊]

Hi,Keith

Thank you for the review and for raising the ASPM L1 point. I agree that ASPM L1 is very effective for power saving.
However, L1 is entered only when the link is completely idle (no pending transactions). During active but low-utilization I/O, the link cannot enter L1 and typically stays trained at its maximum rate. This patch targets exactly that window: it dynamically downgrades the link rate to the minimum sufficient for the current traffic, and upgrades back to maximum when load rises.
So the two mechanisms cover different link conditions and are complementary rather than conflicting: ASPM L1 handles the idle link, while this patch handles the active-but-underutilized link.

Best regards,
Liao Xuan

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发件人：Keith Busch <kbusch@xxxxxxxxxx>
发送时间：2026年11月4日(周三) 03:08
收件人："廖煊"<liaoxuan@xxxxxxxxxxxxxx>
抄　送：axboe<axboe@xxxxxxxxx>; hch<hch@xxxxxx>; sagi<sagi@xxxxxxxxxxx>; "linux-nvme"<linux-nvme@xxxxxxxxxxxxxxxxxxx>; "linux-kernel"<linux-kernel@xxxxxxxxxxxxxxx>; default avatarZheng Tan<tanzheng@xxxxxxxxxx>
主　题：Re: [PATCH 1/3] nvme: Add adaptive PCIe link rate switching function


On Tue, Nov 03, 2026 at 02:25:43PM +0800, Liao Xuan wrote:
> Add support for dynamically adjusting the PCIe link rate of NVMe
> devices based on I/O activity. The link is downgraded to a
> configurable minimum rate during periods of low activity to save
> power, and upgraded to the maximum supported rate as soon as the
> workload exceeds a computed threshold, so that peak performance is
> maintained under load.

Pretty sure PCIe ASPM L1 states would save more power than downgrading
the link rate, as well as have better entry/exit latency than a software
driven monitor and link retrain.