[PATCH v4 14/16] ARM: dts: microchip: sam9x60: Add OTPC node
From: Alexander Dahl
Date: Thu Nov 05 2026 - 08:18:45 EST
The One-Time Programmable (OTP) Memory Controller (OTPC) is the secure
interface between the system and the OTP memory. It also features the
Unique Product ID (UID) registers containing a unique serial number.
See datasheet (DS60001579G) sections "7. Memories" and "23. OTP Memory
Controller (OTPC)" for reference.
Signed-off-by: Alexander Dahl <ada@xxxxxxxxxxx>
---
Notes:
v4:
- Dropped new microchip,sam9x60-otpc compatible,
use microchip,sama7g5-otpc instead
v3:
- Removed needless header include
- Removed clock-names, not part of bindings anymore, and not used by driver
v2:
- squashed with patch adding the clock properties
arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index 4b777c61c1e09..996b13300ca06 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -155,6 +155,14 @@ sdmmc1: sdio-host@90000000 {
status = "disabled";
};
+ otpc: efuse@eff00000 {
+ compatible = "microchip,sama7g5-otpc", "syscon";
+ reg = <0xeff00000 0xec>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 46>;
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
--
2.47.3