[PATCH 4/5] drm/msm/adreno: Add speedbins for A660 GPU
From: Demeter Barna via B4 Relay
Date: Thu Nov 05 2026 - 08:31:36 EST
From: Demeter Barna <me@xxxxxxxxxxxxxxxxxxx>
The SM8350 GPU comes in speed bins, read from QFPROM 0x17b bits 7:5.
Qualcomm's GPU tables for this SoC give:
fuse 1, 3: up to 900 MHz
fuse 0, 5, 7: up to 840 MHz
fuse 4: up to 738 MHz
The levels below are the same in every bin. Map these fuse values to
speed bins 1, 0 and 2. An unknown fuse value falls back to speed bin 0.
Signed-off-by: Demeter Barna <me@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index 4ef2bd6e7..f1ae9932d 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -1096,6 +1096,14 @@ static const struct adreno_info a6xx_gpus[] = {
.gmu_cgc_mode = 0x00020000,
.prim_fifo_threshold = 0x00300200,
},
+ .speedbins = ADRENO_SPEEDBINS(
+ { 0, 0 },
+ { 1, 1 },
+ { 3, 1 },
+ { 4, 2 },
+ { 5, 0 },
+ { 7, 0 },
+ ),
}, {
.chip_ids = ADRENO_CHIP_IDS(0x06060300),
.family = ADRENO_6XX_GEN4,
--
2.53.0