Re: [PATCH 2/4] MIPS: sgi-ip32: Leave MACE PCI control alone in config accesses
From: Thomas Bogendoerfer
Date: Thu Nov 05 2026 - 10:55:13 EST
On Wed, Oct 21, 2026 at 09:24:16PM +0200, Imre Kaloz wrote:
> mace_pci_read_config() clears the master abort interrupt enable in the
> MACE PCI control register around each config read. A register read
> followed by two register writes can hang CRIME 1.1 under DMA load.
>
> Ack master aborts in the error register instead, and follow every
> write with a read so back-to-back accesses cannot form that sequence.
>
> Fixes: c990081bf87b ("[MIPS] Fix IP32 breakage")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Imre Kaloz <kaloz@xxxxxxxxxx>
> ---
> arch/mips/pci/ops-mace.c | 26 +++++++++++++++++++-------
> arch/mips/pci/pci-ip32.c | 2 ++
> 2 files changed, 21 insertions(+), 7 deletions(-)
applied to mips-fixes
Thomas.
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