Re: [PATCH v16 00/18] PCI/CXL: Add CXL reset support for Type 2 devices

From: Srirangan Madhavan

Date: Thu Nov 05 2026 - 14:14:10 EST


On 10/29/26 11:58 AM, Alison Schofield wrote:
Userspace selects "cxl_reset" in reset_method and triggers the reset
through reset. Following Dan's v6 feedback, this uses the PCI interface
instead of adding a memdev-specific sysfs ABI.

For sysfs reset, the generic PCI path invokes the driver's reset_prepare()
callback when provided and disables PCI I/O, memory decoding, and bus
mastering. The CXL path reserves affected HDM ranges exclusively and
blocks IOMMU translations where applicable. It does not offline memory
or revoke mappings; it relies on CXL.mem users retaining conflicting
iomem resources while access remains active.

Changes from v15 [1]:

Srirangan,

I notice you posted this v16 without responding to review feedback on v15.

I've already compared v15 and v16 to see which review comments were addressed.
However, that exercise is no substitute for responding to reviewers and
resolving the discussions they initiate. Rather than me repeating the
outstanding comments from v15, in v16, can you go back and respond to the v15
reviews before we proceed?

Reference is the guidance in Documentation/process/submitting-patches.rst,
under "Respond to review comments". CXL subsystem contributors also often
append the reviewer's name to the end of each changelog item to identify
whose feedback prompted the change.

Thanks,
Alison

Hi Alison,

Following up now that I sent v17 out. I replied to the v15 comments, and each v17 changelog item ends with the name of the reviewer whose feedback prompted it, with links to the comments in the per-patch notes.

Two v15 discussions are still open and are noted in the cover letter: the scope of the region lock, and the attribution for Dave's reference branch. Please let me know if anything is missing.

--
Regards,
Srirangan