[PATCH 0/3] MIPS: CI20: Enable SMP with two CPUs

[Florian Fainelli]

This patch series resurrects SMP support for the CI20 board. This was
submitted back in 2020 by Zhou Yanjie.

Florian Fainelli (1):
  clk: ingenic: Poll JZ4780 CPU1 power status atomically

周琰杰 (Zhou Yanjie) (2):
  MIPS: Ingenic: Add JZ4780 SMP support to the generic platform
  MIPS: CI20: Enable SMP with two CPUs

 MAINTAINERS                           |   1 +
 arch/mips/configs/ci20_defconfig      |   2 +
 arch/mips/generic/Makefile            |   1 +
 arch/mips/generic/ingenic-smp-entry.S |  54 ++++++
 arch/mips/generic/ingenic-smp.c       | 240 ++++++++++++++++++++++++++
 arch/mips/generic/ingenic-smp.h       |  20 +++
 arch/mips/generic/init.c              |   4 +
 arch/mips/ingenic/Kconfig             |   6 +
 arch/mips/kernel/idle.c               |  25 ++-
 drivers/clk/ingenic/jz4780-cgu.c      |   2 +-
 10 files changed, 353 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/generic/ingenic-smp-entry.S
 create mode 100644 arch/mips/generic/ingenic-smp.c
 create mode 100644 arch/mips/generic/ingenic-smp.h

-- 
2.53.0