Re: [PATCH v8 01/20] KVM: x86: Extend VCPU registers for EGPRs

[Jim Mattson]

On Wed, Sep 30, 2026 at 2:35 PM Chang S. Bae <chang.seok.bae@xxxxxxxxx> wrote:
>
> Extend the storage to include extended general-purpose registers (EGPRs:
> R16-R31) when CONFIG_KVM_APX=y. This option is for VMX only.
>
> Although EGPR state is XSAVE-managed, and thus could be stored in the
> guest fpstate, VCPU storage provides a more convenient and efficient
> access path for KVM.
>
> Suggested-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> Signed-off-by: Chang S. Bae <chang.seok.bae@xxxxxxxxx>
> Link: https://lore.kernel.org/abL8SW5JS1aV5goa@xxxxxxxxxx
> ---
>  arch/x86/include/asm/kvm_host.h | 18 ++++++++++++++++++
>  arch/x86/kvm/Kconfig            |  4 ++++
>  2 files changed, 22 insertions(+)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 3af7395c2430..690de9606d6d 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -163,6 +163,24 @@ enum kvm_reg {
>         VCPU_REGS_R13,
>         VCPU_REGS_R14,
>         VCPU_REGS_R15,
> +#endif
> +#ifdef CONFIG_KVM_APX
> +       VCPU_REGS_R16,
> +       VCPU_REGS_R17,
> +       VCPU_REGS_R18,
> +       VCPU_REGS_R19,
> +       VCPU_REGS_R20,
> +       VCPU_REGS_R21,
> +       VCPU_REGS_R22,
> +       VCPU_REGS_R23,
> +       VCPU_REGS_R24,
> +       VCPU_REGS_R25,
> +       VCPU_REGS_R26,
> +       VCPU_REGS_R27,
> +       VCPU_REGS_R28,
> +       VCPU_REGS_R29,
> +       VCPU_REGS_R30,
> +       VCPU_REGS_R31,
>  #endif
>         NR_VCPU_GENERAL_PURPOSE_REGS,

In kvm_vcpu_reset(), KVM unconditionally zeroes the entire vcpu->arch.regs
array on both RESET and INIT:

    /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
    memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));

However, according to the Intel APX Architecture Specification (rev. 9.0),
section 3.1.4.1.1 and Table 3.7, R16-R31 are unchanged on INIT:

  The main difference between EGPRs and legacy GPRs, is that EGPRs are not
  enabled by default (specifically XCR0-enabled) in 64-bit mode, and their
  INIT behavior is XMM-like; in that EGPRs and many other XSAVE-enabled
  register states are un-changed on INIT events as shown in Table 3.7.

By extending NR_VCPU_GENERAL_PURPOSE_REGS to include VCPU_REGS_R16 through
VCPU_REGS_R31 without updating kvm_vcpu_reset(), KVM will erroneously zero
R16-R31 when init_event is true.