Re: [PATCH v8 08/20] KVM: VMX: Support instruction information extension

From: Jim Mattson

Date: Thu Nov 05 2026 - 19:41:54 EST


On Wed, Sep 30, 2026 at 4:55 PM Chang S. Bae <chang.seok.bae@xxxxxxxxx> wrote:
>
> Define the VMCS field offset for the extended instruction information.
> Then, support 5-bit register indices retrieval from VMCS fields.
>
> Note the APX enumeration alone indicates the extension is available.
> For safety, do not assume that previously reserved bits were zero
> on older implementations.
>
> Suggested-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> Suggested-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> Tested-by: Zhao Liu <zhao1.liu@xxxxxxxxx>
> Signed-off-by: Chang S. Bae <chang.seok.bae@xxxxxxxxx>
> Link: https://lore.kernel.org/aakEsXJgO-3m2xca@xxxxxxxxxx
> ---
>
> Note for the review of extensions in following functions:
> +-------+------------------+------------------------------------+
> | Bits | Field Name | Related KVM Functions |
> +=======+==================+====================================+
> | 3:2 | ASIZE | vmx_get_instr_info_addr_size() |
> +-------+------------------+------------------------------------+
> | 4 | Mem/Reg (1=>reg) | vmx_get_instr_info_is_reg() |
> +-------+------------------+------------------------------------+
> | 9:7 | Segment | vmx_get_instr_info_seg_reg() |
> +-------+------------------+------------------------------------+
> | 10 | IndexInvalid | vmx_get_instr_info_base_reg() |
> +-------+------------------+------------------------------------+
> | 11 | BaseInvalid | vmx_get_instr_info_base_is_valid() |
> +-------+------------------+------------------------------------+
> | 20:16 | Reg1 | vmx_get_instr_info_reg() |
> +-------+------------------+------------------------------------+
> | 28:24 | Index | vmx_get_instr_info_index_reg() |
> +-------+------------------+------------------------------------+
> | 36:32 | Base | vmx_get_instr_info_base_reg() |
> +-------+------------------+------------------------------------+
> | 44:40 | Reg2 | vmx_get_instr_info_reg2() |
> +-------+------------------+------------------------------------+
>
> Reference:
> APX Specification, Table 3.11 Extended Instruction-Information (EII)
> VMCS Field
> ---
> arch/x86/include/asm/vmx.h | 2 ++
> arch/x86/kvm/vmx/vmx.h | 42 +++++++++++++++++++++++++++-----------
> 2 files changed, 32 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index f98e40df5004..0b1e2353db3b 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -277,6 +277,8 @@ enum vmcs_field {
> PID_POINTER_TABLE_HIGH = 0x00002043,
> GUEST_PHYSICAL_ADDRESS = 0x00002400,
> GUEST_PHYSICAL_ADDRESS_HIGH = 0x00002401,
> + EXTENDED_INSTRUCTION_INFO = 0x00002406,
> + EXTENDED_INSTRUCTION_INFO_HIGH = 0x00002407,
> VMCS_LINK_POINTER = 0x00002800,
> VMCS_LINK_POINTER_HIGH = 0x00002801,
> GUEST_IA32_DEBUGCTL = 0x00002802,
> diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
> index 863b08478544..4a76af613720 100644
> --- a/arch/x86/kvm/vmx/vmx.h
> +++ b/arch/x86/kvm/vmx/vmx.h
> @@ -330,9 +330,18 @@ static __always_inline unsigned long vmx_get_exit_qual(struct kvm_vcpu *vcpu)
> return vt->exit_qualification;
> }
>
> +/*
> + * The APX enumeration guarantees the presence of the extended fields.
> + * The host CPUID bit alone is sufficient to rely on it.
> + */
> +static inline bool vmx_instr_info_extended(void)
> +{
> + return cpu_feature_enabled(X86_FEATURE_APX);
> +}

Sashiko is not wrong. When KVM runs on top of Hyper-V with eVMCS enabled,
vmcs_read64() becomes evmcs_read64(). Because eVMCS v1 does not define a
mapping for EXTENDED_INSTRUCTION_INFO (0x2406) in vmcs_field_to_evmcs_1[],
get_evmcs_offset() triggers a WARN_ONCE() and evmcs_read64() returns 0 on
every instruction exit that calls vmx_get_instr_info(), even when APX is
not enabled for the guest.

Until eVMCS supports EXTENDED_INSTRUCTION_INFO, vmx_instr_info_extended()
must be predicated on !kvm_is_using_evmcs().

Moreover, enable_apx should be forced off when kvm_is_using_evmcs() is true.