[tip: perf/urgent] perf/amd/ibs: Reset CPU0 IBS state on syscore resume

[tip-bot2 for Ravi Bangoria]

The following commit has been merged into the perf/urgent branch of tip:

Commit-ID:     2c1d35bd95b13b50b43a0cb2167305dabfb54c07
Gitweb:        https://git.kernel.org/tip/2c1d35bd95b13b50b43a0cb2167305dabfb54c07
Author:        Ravi Bangoria <ravi.bangoria@xxxxxxx>
AuthorDate:    Mon, 26 Oct 2026 04:18:35 
Committer:     Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Fri, 06 Nov 2026 09:40:55 +01:00

perf/amd/ibs: Reset CPU0 IBS state on syscore resume

During a suspend/resume cycle, all CPUs except CPU0 go through hotplug
callbacks, which sets up IBS state. CPU0 bypasses this path, leaving its
IBS state stale after resume.

Fix this bug by explicitly setting CPU0's IBS state in the
syscore ->resume() callback.

Fixes: efa5700ec0da ("perf/amd/ibs: Support IBS_{FETCH|OP}_CTL2[Dis] to eliminate RMW race")
Signed-off-by: Ravi Bangoria <ravi.bangoria@xxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Reviewed-by: Jim Mattson <jmattson@xxxxxxxxxx>
Link: https://patch.msgid.link/20261026041838.941-2-ravi.bangoria@xxxxxxx
---
 arch/x86/events/amd/ibs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 3531f9c..bfb51f8 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -1948,7 +1948,7 @@ static int perf_ibs_suspend(void *data)
 static void perf_ibs_resume(void *data)
 {
 	ibs_eilvt_setup();
-	setup_APIC_ibs();
+	x86_pmu_amd_ibs_starting_cpu(smp_processor_id());
 }
 
 static const struct syscore_ops perf_ibs_syscore_ops = {