Re: [PATCH v6 09/10] dt-bindings: display: tegra: Document 8-bit CPU parallel interface

From: Svyatoslav Ryhel

Date: Fri Nov 06 2026 - 09:19:20 EST


пт, 6 лист. 2026 р. о 16:08 Thierry Reding <thierry.reding@xxxxxxxxxx> пише:
>
> On Thu, Nov 05, 2026 at 04:05:09PM +0200, Svyatoslav Ryhel wrote:
> > Document 8-bit CPU parallel MIPI DBI Type B interface provided by
> > Tegra20/30 SoCs display controller.
> >
> > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> > Signed-off-by: Svyatoslav Ryhel <clamor95@xxxxxxxxx>
> > ---
> > .../display/tegra/nvidia,tegra20-dbi.yaml | 113 ++++++++++++++++++
> > .../display/tegra/nvidia,tegra20-dc.yaml | 22 ++++
> > 2 files changed, 135 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dbi.yaml
> >
> [...]
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
> > index 69be95afd5627..ffeb124905dbf 100644
> > --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
> > @@ -79,6 +79,16 @@ properties:
> > rgb:
> > type: object
> >
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 0
> > +
> > +patternProperties:
> > + "^dbi@[0-1]$":
> > + $ref: /schemas/display/tegra/nvidia,tegra20-dbi.yaml#
>
> I think it might be better to group these under a separate dbi node at
> the top-level, making it a sibling to the "rgb" node. If you add
> #address-cells and #size-cells here, I think that means technically the
> "rgb" is now in the same address space as those new dbi nodes and would
> need its own "reg" property and such.
>

Only 1 DBI node per DC is available. Adding address/size cells means
nothing for rgb.

> Thierry