[PATCH v3 03/23] arm64: sysreg: Convert OSLSR to automatic register generation
From: Steffen Eiden
Date: Fri Nov 06 2026 - 11:10:02 EST
Convert OSLSR to automatic register generation as per DDI0601. As
OSLSR_OLSM is a composite field using bit 0 and bit 3 the combined
values are still defined manually. While at it rename
OSLSR_EL1_OSLM_IMPLEMENTED to OSLSR_EL1_OSLM_IMP to be consistent with
the rest of the system register values.
No functional changes.
Co-developed-by: Andreas Grapentin <gra@xxxxxxxxxxxxx>
Signed-off-by: Andreas Grapentin <gra@xxxxxxxxxxxxx>
Signed-off-by: Steffen Eiden <seiden@xxxxxxxxxxxxx>
---
arch/arm64/include/asm/sysreg.h | 12 +++++++-----
arch/arm64/kvm/sys_regs.c | 2 +-
arch/arm64/tools/sysreg | 14 ++++++++++++++
3 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e3b60ee03023..2ec9ba9cd896 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -186,11 +186,13 @@
#define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
#define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
-#define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
-#define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
-#define OSLSR_EL1_OSLM_NI 0
-#define OSLSR_EL1_OSLM_IMPLEMENTED BIT(3)
-#define OSLSR_EL1_OSLK BIT(1)
+#define OSLSR_EL1_OSLM_MASK (OSLSR_EL1_OSLM0_MASK | OSLSR_EL1_OSLM1_MASK)
+#define OSLSR_EL1_OSLM_NI \
+ ((OSLSR_EL1_OSLM1_NI << OSLSR_EL1_OSLM1_SHIFT) | \
+ (OSLSR_EL1_OSLM0_VAL_0 << OSLSR_EL1_OSLM0_SHIFT))
+#define OSLSR_EL1_OSLM_IMP \
+ ((OSLSR_EL1_OSLM1_IMP << OSLSR_EL1_OSLM1_SHIFT) | \
+ (OSLSR_EL1_OSLM0_VAL_0 << OSLSR_EL1_OSLM0_SHIFT))
#define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4)
#define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2b28b929f9f3..8c91de6a4097 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -3309,7 +3309,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
{ SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
- OSLSR_EL1_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
+ OSLSR_EL1_OSLM_IMP, .set_user = set_oslsr_el1, },
{ SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 997c62ab72e6..5d38f115bac1 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -122,6 +122,20 @@ Res0 63:1
Field 0 OSLK
EndSysreg
+Sysreg OSLSR_EL1 2 0 1 1 4
+Res0 63:4
+UnsignedEnum 3 OSLM1
+ 0b0 NI
+ 0b1 IMP
+EndEnum
+UnsignedEnum 2 nTT
+EndEnum
+Field 1 OSLK
+UnsignedEnum 0 OSLM0
+ 0b0 VAL_0
+EndEnum
+EndSysreg
+
Sysreg SPMACCESSR_EL1 2 0 9 13 3
UnsignedEnum 63:62 P31
0b00 TRAP_RW
--
2.56.0