[PATCH v3 12/13] arm64: dts: st: add iwdg1 and iwdg2 support to stm32mp251
From: Antonio Borneo
Date: Fri Nov 06 2026 - 11:38:21 EST
From: Clément Le Goffic <clement.legoffic@xxxxxxxxxxx>
Add the watchdog nodes to the SoC device tree.
Signed-off-by: Clément Le Goffic <clement.legoffic@xxxxxxxxxxx>
Signed-off-by: Antonio Borneo <antonio.borneo@xxxxxxxxxxx>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index dac3d2d23ff00..02064fd05a259 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -1474,6 +1474,26 @@ rng: rng@42020000 {
status = "disabled";
};
+ iwdg1: watchdog@44010000 {
+ compatible = "st,stm32mp1-iwdg";
+ reg = <0x44010000 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_BUS_IWDG1>, <&scmi_clk CK_SCMI_LSI>;
+ clock-names = "pclk", "lsi";
+ access-controllers = <&rifsc 98>;
+ status = "disabled";
+ };
+
+ iwdg2: watchdog@44020000 {
+ compatible = "st,stm32mp1-iwdg";
+ reg = <0x44020000 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CK_BUS_IWDG2>, <&scmi_clk CK_SCMI_LSI>;
+ clock-names = "pclk", "lsi";
+ access-controllers = <&rifsc 99>;
+ status = "disabled";
+ };
+
spi8: spi@46020000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.34.1