Re: [PATCH v9 16/25] iommu/arm-smmu-v3-kvm: Emulate CMDQ for host
From: Nicolin Chen
Date: Fri Nov 06 2026 - 14:09:02 EST
On Thu, Oct 15, 2026 at 08:08:47PM +0000, Mostafa Saleh wrote:
> @@ -385,18 +482,51 @@ static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu,
> */
> mask = read_only & ~(IDR0_S2P | IDR0_VMID16 | IDR0_MSI | IDR0_HYP | IDR0_ATS);
> break;
> - /* Passthrough the register access for bisectability, handled later */
> case ARM_SMMU_CMDQ_BASE:
> + /*
> + * Although allowed to use smaller size, we rely on the SMMUv3 driver
> + * using 64-bit store instruction for simplicity.
> + */
> + if (len != sizeof(u64))
> + break;
> if (is_write) {
> /* Not allowed by the architecture */
> if (is_cmdq_enabled(smmu))
The spec says the register is RO when CMDQEN=0. So, maybe it should
be allowed by just ignoring the write?
> case ARM_SMMU_CMDQ_CONS:
> + if (len != sizeof(u32))
> + break;
> + if (is_write) {
> + if (WARN_ON(is_cmdq_enabled(smmu)))
> + break;
Ditto
Nicolin