Re: [PATCH v3 03/18] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu

[Yosry Ahmed]

On Fri, Nov 6, 2026 at 1:16 PM Chen, Zide <zide.chen@xxxxxxxxx> wrote:
>
>
> >> @@ -214,9 +214,15 @@ static void amd_pmu_refresh(struct kvm_vcpu *vcpu)
> >>
> >>      pmu->counter_bitmask[KVM_PMC_GP] = BIT_ULL(48) - 1;
> >>
> >> -    pmu->reserved_bits = 0xfffffff000280000ull;
> >> +    /*
> >> +     * AMD PerfEvtSeln registers do not support PinControl, and KVM does
> >> +     * not emulate AnyThread due to cross-VM information leakage on SMT
> >> +     * cores (as on the Intel side).
> >> +     */
> >> +    pmu->eventsel_rsvd = GENMASK_ULL(63, 36) | ARCH_PERFMON_EVENTSEL_PIN_CONTROL |
> >> +                         ARCH_PERFMON_EVENTSEL_ANY;
> >
> > It's probably better if we diff against the generic pmu->eventsel_rsvd
> > set by kvm_pmu_refresh(), and explicitly add/remove bits as needed here,
> > like the Intel code. Then we also avoid re-iterating the AnyThread
> > rationale here.
> >
> > What do you think?
>
>
> Yes, I think this is better. How about this:

LGTM, with that feel free to add:

Reviewed-by: Yosry Ahmed <yosry@xxxxxxxxxx>

>
> diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c
> index fb5a298244ec..15d4b94826f8 100644
> --- a/arch/x86/kvm/svm/pmu.c
> +++ b/arch/x86/kvm/svm/pmu.c
> @@ -213,12 +213,11 @@ static void amd_pmu_refresh(struct kvm_vcpu *vcpu)
>         pmu->counter_bitmask[KVM_PMC_GP] = BIT_ULL(48) - 1;
>
> /*
> -      * AMD PerfEvtSeln registers do not support PinControl, and KVM does
> -        * not emulate AnyThread due to cross-VM information leakage on SMT
> -        * cores (as on the Intel side).
> +        * AMD PerfEvtSeln registers do not support PinControl, but support
> +        * a 12-bit EventSelect (bits 35:32 in addition to 7:0).
>          */
> -       pmu->eventsel_rsvd = GENMASK_ULL(63, 36) |
> ARCH_PERFMON_EVENTSEL_PIN_CONTROL |
> -                            ARCH_PERFMON_EVENTSEL_ANY;
> +       pmu->eventsel_rsvd |= ARCH_PERFMON_EVENTSEL_PIN_CONTROL;
> +       pmu->eventsel_rsvd &= ~AMD64_EVENTSEL_EVENT;
>         if (guest_cpu_cap_has(vcpu, X86_FEATURE_SVM) &&
> kvm_vcpu_has_mediated_pmu(vcpu))
>                 pmu->eventsel_rsvd &= ~AMD64_EVENTSEL_HOST_GUEST_MASK;
>
> >
> >
> >>      if (guest_cpu_cap_has(vcpu, X86_FEATURE_SVM) && kvm_vcpu_has_mediated_pmu(vcpu))
> >> -            pmu->reserved_bits &= ~AMD64_EVENTSEL_HOST_GUEST_MASK;
> >> +            pmu->eventsel_rsvd &= ~AMD64_EVENTSEL_HOST_GUEST_MASK;
>