[PATCH 1/2] dt-bindings: clock: qcom: Add I2C and TSC clocks for Nord
From: Taniya Das
Date: Sat Nov 07 2026 - 13:07:36 EST
Expose the I2C slave and TSC subsystem clock and reset IDs used by
Nord SE GCC in device trees.
Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
---
include/dt-bindings/clock/qcom,nord-segcc.h | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,nord-segcc.h b/include/dt-bindings/clock/qcom,nord-segcc.h
index de4539b999850294926854a45db2997043c74f2c..921b216103da703818fae4d4a572a6a5288e1513 100644
--- a/include/dt-bindings/clock/qcom,nord-segcc.h
+++ b/include/dt-bindings/clock/qcom,nord-segcc.h
@@ -86,6 +86,15 @@
#define SE_GCC_QUPV3_WRAP1_S_AHB_CLK 76
#define SE_GCC_EMAC0_CNOC_APB_CLK 77
#define SE_GCC_EMAC1_CNOC_APB_CLK 78
+#define SE_GCC_CNOC_I2C_SLAVE_CLK_SRC 79
+#define SE_GCC_I2C_SLAVE_AHB_CLK 80
+#define SE_GCC_I2C_SLAVE_XO_CLK 81
+#define SE_GCC_I2C_SLAVE_XO_CLK_SRC 82
+#define SE_GCC_GPLL1 83
+#define SE_GCC_TSCSS_AHB_CLK 84
+#define SE_GCC_TSCSS_CLK_SRC 85
+#define SE_GCC_TSCSS_CNTR_CLK 86
+#define SE_GCC_TSCSS_ETU_CLK 87
/* SE_GCC power domains */
#define SE_GCC_EMAC0_GDSC 0
@@ -96,5 +105,7 @@
#define SE_GCC_EMAC1_BCR 1
#define SE_GCC_QUPV3_WRAPPER_0_BCR 2
#define SE_GCC_QUPV3_WRAPPER_1_BCR 3
+#define SE_GCC_I2C_BCR 4
+#define SE_GCC_TSCSS_BCR 5
#endif
--
2.34.1