Re: (subset) [PATCH v2 0/4] arm64: dts: qcom: Set snps,resume-hs-terminations for M31 eUSB2 PHY platforms

[Bjorn Andersson]

On Sun, 18 Oct 2026 19:15:43 -0700, Peter Chen wrote:
> The DWC3 controllers on Qualcomm SoCs paired with the M31 eUSB2 PHY
> need GUCTL1[10] (RESUME_OPMODE_HS_HOST) set for host-mode USB2 L2/L1
> resume, as required by the HPG. Without it, a USB2 HS device cannot be
> reset after it is runtime resumed: PORTSC.PR never clears
> (PORTSC = 0xe11) and the hub driver fails with
> "port_wait_reset: err = -16".
> 
> [...]

Applied, thanks!

[4/4] arm64: dts: qcom: hawi: Set snps,resume-hs-terminations for USB controller
      commit: 3c7371a907cff175fe316fce61e875e3f8db0897

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>