Re: (subset) [PATCH 1/1] arm64: dts: qcom: glymur: Set snps,resume-hs-terminations for USB controllers

[Bjorn Andersson]

On Fri, 16 Oct 2026 02:13:36 -0700, Peter Chen wrote:
> The DWC3 controllers on Glymur are paired with the M31 eUSB2 PHY.
> According to HPG, host-mode USB2 L2/L1 resume with this PHY, GUCTL1[10]
> (RESUME_OPMODE_HS_HOST) must be set.
> 
> Without this bit setting, USB2 HS device cannot be reset after it is
> runtime resumed. For example, after:
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: glymur: Set snps,resume-hs-terminations for USB controllers
      commit: 45cf7caf54392c64d1046b88cc9ffcfdf52af968

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>