[tip: irq/drivers] irqchip/alpine-msi: Add missing space after comma in GENMASK_ULL

[tip-bot2 for Eliav Farber]

The following commit has been merged into the irq/drivers branch of tip:

Commit-ID:     88b4eda43e98f2d3ede58999ebc6281ee7a82ee3
Gitweb:        https://git.kernel.org/tip/88b4eda43e98f2d3ede58999ebc6281ee7a82ee3
Author:        Eliav Farber <farbere@xxxxxxxxxx>
AuthorDate:    Sat, 24 Oct 2026 19:36:18 
Committer:     Thomas Gleixner <tglx@xxxxxxxxxx>
CommitterDate: Mon, 09 Nov 2026 10:20:18 +01:00

irqchip/alpine-msi: Add missing space after comma in GENMASK_ULL

Fix the coding-style issue reported by checkpatch:

  ERROR: space required after that ',' (ctx:VxV)

No functional change.

Signed-off-by: Eliav Farber <farbere@xxxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxx>
Reviewed-by: Radu Rendec <radu@xxxxxxxxxx>
Link: https://patch.msgid.link/20261024193620.39999-4-farbere@xxxxxxxxxx
---
 drivers/irqchip/irq-alpine-msi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-alpine-msi.c b/drivers/irqchip/irq-alpine-msi.c
index 20f1f7f..8155f63 100644
--- a/drivers/irqchip/irq-alpine-msi.c
+++ b/drivers/irqchip/irq-alpine-msi.c
@@ -210,7 +210,7 @@ static int alpine_msix_init(struct device_node *node, struct device_node *parent
 	 * To select the primary GIC as the target GIC, bits [18:17] must be set
 	 * to 0x0. In this case, bit 16 (SPI_TARGET_CLUSTER0) must be set.
 	 */
-	priv->addr = res.start & GENMASK_ULL(63,20);
+	priv->addr = res.start & GENMASK_ULL(63, 20);
 	priv->addr |= ALPINE_MSIX_SPI_TARGET_CLUSTER0;
 
 	if (of_property_read_u32(node, "al,msi-base-spi", &priv->spi_first)) {