[PATCH] arm64: dts: qcom: mahua-crd: Enable DisplayPort

From: Nabige Aala

Date: Mon Nov 09 2026 - 10:51:27 EST


Mahua CRD uses the same DisplayPort configuration as Glymur CRD.
Enable the two DisplayPort controllers associated with the
Type-C ports and define the supported link frequencies for
their outputs.

Signed-off-by: Nabige Aala <nabige.aala@xxxxxxxxxxxxxxxx>
---
This patch enables the DisplayPort support in Mahua CRD.

Functional operation depends on following PHY PLL series:
https://lore.kernel.org/all/20261001-glymur-phy-v3-v5-0-3848c2615d5a@xxxxxxxxxxxxxxxx
---
arch/arm64/boot/dts/qcom/mahua-crd.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/mahua-crd.dts b/arch/arm64/boot/dts/qcom/mahua-crd.dts
index 17e40f2a6259..2605c0e70c88 100644
--- a/arch/arm64/boot/dts/qcom/mahua-crd.dts
+++ b/arch/arm64/boot/dts/qcom/mahua-crd.dts
@@ -20,6 +20,22 @@ / {
compatible = "qcom,mahua-crd", "qcom,mahua";
};

+&mdss_dp0 {
+ status = "okay";
+};
+
+&mdss_dp0_out {
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss_dp1 {
+ status = "okay";
+};
+
+&mdss_dp1_out {
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
&pcie3b_phy {
vdda-phy-supply = <&vreg_l3c_e1_0p89>;
vdda-pll-supply = <&vreg_l2c_e1_1p14>;

---
base-commit: d6bcfc94eb4da6e089c5473970cd96727292fd97
change-id: 20261104-mahua-dp-df2541837127

Best regards,
--
Nabige Aala <nabige.aala@xxxxxxxxxxxxxxxx>