Re: [PATCH] clk: sunxi-ng: h6: Let the SPDIF clock set the audio PLL rate
From: Chen-Yu Tsai
Date: Mon Nov 09 2026 - 12:10:46 EST
On Wed, 04 Nov 2026 19:50:27 +0100, Jernej Skrabec wrote:
> Unlike the I2S clocks, the SPDIF clock can't change the audio PLL rate,
> so it can only divide down the rate the PLL already runs at. That covers
> only one of the 44.1 kHz and 48 kHz sample rate families, and the other
> one is sent at the wrong rate.
>
> Propagate rate changes to the parent, like the I2S clocks do.
>
> [...]
Applied to sunxi/clk-for-7.5 in sunxi, thanks!
[1/1] clk: sunxi-ng: h6: Let the SPDIF clock set the audio PLL rate
https://git.kernel.org/sunxi/linux/c/280af24c8605
Best regards,
--
Chen-Yu Tsai <wens@xxxxxxxxxx>