[PATCH 1/2] x86/sev: Scan each core's own RMPOPT window

[Ashish Kalra]

From: Ashish Kalra <ashish.kalra@xxxxxxx>

rmpopt_scan_range() walked a single global [rmpopt_pa_start, rmpopt_pa_end]
range, which is only correct while every core shares one window.  Read the
executing core's own RMPOPT_BASE instead and walk only that window, so each
core optimizes the window its own RMPOPT_BASE points at.

The window is described entirely by the RMPOPT_BASE MSR: RMPOPT_BASE_ADDR
(bits 51:30) is the 1 GB-aligned base and RMPOPT_TABLE_SIZE (bits 22:1) is
the window size in GB.  Walk [base, base + size), clamped to the top of
populated memory.

Signed-off-by: Ashish Kalra <ashish.kalra@xxxxxxx>
---
 arch/x86/include/asm/msr-index.h |  2 ++
 arch/x86/virt/svm/sev.c          | 29 +++++++++++++++--------------
 2 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index c0914829a925..6d453bb13621 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -773,6 +773,8 @@
 #define MSR_AMD64_RMPOPT_BASE		0xc0010139
 #define MSR_AMD64_RMPOPT_ENABLE_BIT	0
 #define MSR_AMD64_RMPOPT_ENABLE		BIT_ULL(MSR_AMD64_RMPOPT_ENABLE_BIT)
+#define MSR_AMD64_RMPOPT_TABLE_SIZE	GENMASK_ULL(22, 1)
+#define MSR_AMD64_RMPOPT_BASE_ADDR	GENMASK_ULL(51, 30)
 
 #define MSR_SVSM_CAA			0xc001f000
 
diff --git a/arch/x86/virt/svm/sev.c b/arch/x86/virt/svm/sev.c
index 4de9681cc2f8..a2756b18d5f7 100644
--- a/arch/x86/virt/svm/sev.c
+++ b/arch/x86/virt/svm/sev.c
@@ -8,6 +8,7 @@
  *
  */
 
+#include <linux/bitfield.h>
 #include <linux/cc_platform.h>
 #include <linux/printk.h>
 #include <linux/mm_types.h>
@@ -125,8 +126,6 @@ static void *rmp_bookkeeping __ro_after_init;
 
 static u64 probed_rmp_base, probed_rmp_size;
 
-static u64 rmpopt_pa_start, rmpopt_pa_end;
-
 enum rmpopt_op_type {
 	RMPOPT_OP_VERIFY_AND_REPORT_STATUS,
 	RMPOPT_OP_REPORT_STATUS
@@ -618,11 +617,18 @@ static void rmpopt(u64 pa)
 		     : "memory", "cc");
 }
 
+/* A core can only RMPOPT within its own window, [base, base + size). */
 static void rmpopt_scan_range(void *arg)
 {
-	u64 pa;
+	u64 msr, base, end, pa;
+	unsigned int size_gb;
+
+	rdmsrq(MSR_AMD64_RMPOPT_BASE, msr);
+	base = msr & MSR_AMD64_RMPOPT_BASE_ADDR;
+	size_gb = FIELD_GET(MSR_AMD64_RMPOPT_TABLE_SIZE, msr);
+	end = min_t(u64, base + (u64)size_gb * SZ_1G, ALIGN(PFN_PHYS(max_pfn), SZ_1G));
 
-	for (pa = rmpopt_pa_start; pa < rmpopt_pa_end; pa += SZ_1G)
+	for (pa = base; pa < end; pa += SZ_1G)
 		rmpopt(pa);
 }
 
@@ -650,12 +656,6 @@ static int __init rmpopt_init(void)
 
 	INIT_DELAYED_WORK(&rmpopt_delayed_work, do_rmpopt_work);
 
-	/* The optimization range is fixed at boot; compute it once. */
-	rmpopt_pa_start = ALIGN_DOWN(PFN_PHYS(min_low_pfn), SZ_1G);
-	rmpopt_pa_end = ALIGN(PFN_PHYS(max_pfn), SZ_1G);
-	if ((rmpopt_pa_end - rmpopt_pa_start) > SZ_2T)
-		rmpopt_pa_end = rmpopt_pa_start + SZ_2T;
-
 	pr_info("RMPOPT optimizations enabled\n");
 
 	rmpopt_soft_init = true;
@@ -665,7 +665,7 @@ static int __init rmpopt_init(void)
 
 void snp_enable_rmpopt(void)
 {
-	u64 base;
+	u64 base, pa_start;
 	int cpu;
 
 	if (!cc_platform_has(CC_ATTR_HOST_SEV_SNP))
@@ -678,14 +678,15 @@ void snp_enable_rmpopt(void)
 		return;
 
 	/*
-	 * Per-CPU RMPOPT tables cover at most 2 TB.  Program each core's
-	 * RMPOPT_BASE with the start of RAM to optimize up to 2 TB.
+	 * A core's RMPOPT_BASE covers at most 2 TB.  Program every core with
+	 * the start of RAM to optimize up to 2 TB.
 	 */
+	pa_start = ALIGN_DOWN(PFN_PHYS(min_low_pfn), SZ_1G);
 	rdmsrq(MSR_AMD64_RMPOPT_BASE, base);
 	if (!(base & MSR_AMD64_RMPOPT_ENABLE))
 		for_each_cpu(cpu, cpu_primary_thread_mask)
 			wrmsrq_on_cpu(cpu, MSR_AMD64_RMPOPT_BASE,
-				      rmpopt_pa_start | MSR_AMD64_RMPOPT_ENABLE);
+				      pa_start | MSR_AMD64_RMPOPT_ENABLE);
 
 	mod_delayed_work(rmpopt_wq, &rmpopt_delayed_work,
 			 msecs_to_jiffies(RMPOPT_WORK_TIMEOUT));
-- 
2.43.0