Re: [PATCH v3 1/3] clk: socfpga: agilex: register the SP timer clocks early

[Dinh Nguyen]

On 10/13/26 02:07, Adrian Ng Ho Yin wrote:
> The DW APB timers are probed through TIMER_OF_DECLARE() from time_init()
> and cannot defer, but the clock manager is a platform driver registered
> at core_initcall(). The timer's clk_get() therefore fails and the timer
> is never brought up.
>
> Register only l4_sp_clk and its parents (boot_clk, main_pll, periph_pll,
> main_pll_c1, peri_pll_c1 and noc_free_clk) from of_clk_init() using
> CLK_OF_DECLARE_DRIVER(), with every other clock left as -EPROBE_DEFER.
> The remaining clocks are still registered when the platform driver
> probes, which reuses the early provider.
>
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>
> ---
>   drivers/clk/socfpga/clk-agilex.c | 242 ++++++++++++++++++++++++-------
>   1 file changed, 187 insertions(+), 55 deletions(-)
I think this needs a Fixes tag:

Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the 
Agilex platform")

and the Cc: stable

Other than that, it looks good to me.

Dinh