[PATCH 08/22] usb: dwc3: fix a few spelling mistakes in comments

[Shunbo Shi]

No functional changes.

Signed-off-by: Shunbo Shi <shishunbo@xxxxxxxxxxxxxxxxxxxx>
---
 drivers/usb/dwc3/core.h | 4 ++--
 drivers/usb/dwc3/glue.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index f3dabb37f806..ba38a3fb9436 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1014,7 +1014,7 @@ struct dwc3_glue_ops {
  * @err_recovery_work: workqueue used for controller error recovery
  * @ep0_trb: trb which is used for the ctrl_req
  * @bounce: address of bounce buffer
- * @setup_buf: used while precessing STD USB requests
+ * @setup_buf: used while processing STD USB requests
  * @ep0_trb_addr: dma address of @ep0_trb
  * @bounce_addr: dma address of @bounce
  * @ep0_usb_req: dummy req used while handling STD USB requests
@@ -1161,7 +1161,7 @@ struct dwc3_glue_ops {
  *			check during HS transmit.
  * @resume_hs_terminations: Set if we enable quirk for fixing improper crc
  *			generation after resume from suspend.
- * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
+ * @ulpi_ext_vbus_drv: Set to configure the upli chip to drives CPEN pin
  *			VBUS with an external supply.
  * @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
  *			instances in park mode.
diff --git a/drivers/usb/dwc3/glue.h b/drivers/usb/dwc3/glue.h
index d738e1739ae0..a1284c481390 100644
--- a/drivers/usb/dwc3/glue.h
+++ b/drivers/usb/dwc3/glue.h
@@ -30,7 +30,7 @@ struct dwc3_properties {
  * @res: resource for the DWC3 core mmio region
  * @ignore_clocks_and_resets: clocks and resets defined for the device should
  *		be ignored by the DWC3 core, as they are managed by the glue
- * @skip_core_init_mode: Skip the finial initialization of the target mode, as
+ * @skip_core_init_mode: Skip the final initialization of the target mode, as
  *		it must be managed by the glue
  * @properties: dwc3 software manage properties
  */
-- 
2.53.0