Re: [PATCH v8 00/11] serial: 8250_dw: share RX trigger setup and describe Allwinner UARTs
From: Andy Shevchenko
Date: Tue Nov 10 2026 - 05:55:17 EST
On Tue, Nov 10, 2026 at 10:54:40AM +0100, Kryštof Černý wrote:
> > Based on tty-next at 6628e7d4c6b2 with the posted RX trigger callback-lifetime
> > fix [0] and DW BUSY-safe divisor fix v4 [1]. Platform setup runs before
> > installing the BUSY-safe divisor setter.
> >
> > [0] https://lore.kernel.org/r/20261024-submit-serial-8250-rxtrig-lifetime-v1-v1-1-731b78d5003d@xxxxxxxxx
> > [1] https://lore.kernel.org/r/20261027-submit-serial-8250-dw-divisor-v1-v4-1-41714a75e15a@xxxxxxxxx
> Hello,
> thanks for the work, I wanted to upstream my changes [0], but got redirected
> here instead. This fixes the issues I have had in a better way.
> I have tested the whole series, so I reply to the cover letter, didn't make
> sense to me to reply to all messages with tested by, but I am not sure if
> that is the right way.
You are doing fine, thanks!
> Tested on Unipi G110 controllers (Rockchip RK3328, CPR-described
> 64-byte FIFOs, ttyS1 and ttyS2) on top of tty-next 6628e7d4c6b2 with
> the two prerequisites. rx_trig_bytes now reports 32 instead of 8 by
> default, and 1/16/32/62 select the matching hardware levels, checked by
> chunk sizes in internal loopback and over a real RS-485 bus between the
> two ports at 9600 and 115200 baud. Changing the level mid-transfer
> kept all data, and the level survives termios changes and is kept when
> set while the port is closed.
>
> Tested-by: Kryštof Černý <cleverline1mc@xxxxxxxxx> # RK3328
>
> [0] https://lore.kernel.org/all/20261109-8250-select-u6-64bit-v1-0-04bc8332fa34@xxxxxxxxx/
--
With Best Regards,
Andy Shevchenko