[PATCH v2 2/4] gpio: 104-idi-48: fix max_register blocking the IRQ register

[shao.mingyin]

From: Shao Mingyin <shao.mingyin@xxxxxxxxxx>

The regmap config declares max_register = 0x6, but the device's IRQ
status/enable register lives at offset 0x7 (IDI48_IRQ_STATUS /
IDI48_IRQ_ENABLE, also listed in the readable/precious ranges and used
as status_base/unmask_base by the regmap-irq chip).  regmap_readable()
and regmap_writeable() both return false for any register above
max_register, so regmap_read() of the status register fails with -EIO
inside regmap_irq_thread() and no GPIO interrupt is ever delivered.

Raise max_register to 0x7 so the IRQ register is accessible.

Fixes: e28432a77365 ("gpio: 104-idi-48: Migrate to the regmap-irq API")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Shao Mingyin <shao.mingyin@xxxxxxxxxx>
Acked-by: William Breathitt Gray <wbg@xxxxxxxxxx>
---
 drivers/gpio/gpio-104-idi-48.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c
index fb017569cf..493d1fe708 100644
--- a/drivers/gpio/gpio-104-idi-48.c
+++ b/drivers/gpio/gpio-104-idi-48.c
@@ -78,7 +78,7 @@
 	.reg_stride = 1,
 	.val_bits = 8,
 	.io_port = true,
-	.max_register = 0x6,
+	.max_register = 0x7,
 	.wr_table = &idi_48_wr_table,
 	.rd_table = &idi_48_rd_table,
 	.precious_table = &idi_48_precious_table,