[PATCH v2 0/3] phy: exynos5-usbdrd: fix HS phy init count on Exynos2200
From: Soheyb
Date: Tue Nov 10 2026 - 22:24:59 EST
The UTMI phy of Exynos2200 initializes the high-speed (eUSB2) phy but
never exits it, so the high-speed phy is not set up again after it lost
power in system sleep (patch 3, v1 [1]).
Sashiko's review of v1 [2] found two error paths that v1 leaves wrong: a
failed init of the high-speed phy is ignored, so the exit that follows
takes its init count below zero; and the high-speed phy exits before
the steps of the UTMI exit that can fail, so a failed exit leaves the
UTMI phy initialized and the high-speed phy not. Patch 2 returns the
init error, and patch 3 exits the high-speed phy last. Patch 1 undoes
the UTMI init when it fails, which its clocks path already lacks and
which patch 2 makes reachable from the high-speed phy.
Changes in v2:
- patch 1, new: undo the init on failure
- patch 2, new: return the init error of the high-speed phy
- patch 3: exit the high-speed phy last, once the rest of the exit has
succeeded; drop the comment (Ivaylo); his Acked-by of v1 is left
out, since the exit has moved
Tested on a Google Pixel 9 (Tensor G4), an out-of-tree port on 7.3-rc7
that uses the Exynos2200 phy ops and powers USB off in system sleep:
USB comes back after each sleep, and with each error path forced by a
test-only switch, both init counts stay balanced. Not tested on
Exynos2200 hardware, nor built in linux-phy next as a whole.
[1] https://lore.kernel.org/all/20261109221522.2796426-1-soheyb_boulaa@xxxxxxxxx/
[2] https://lore.kernel.org/linux-phy/sashiko-outbox-205724@xxxxxxxxxx/
Soheyb (3):
phy: exynos5-usbdrd: power the Exynos2200 phy down when its init fails
phy: exynos5-usbdrd: return the Exynos2200 high-speed phy init error
phy: exynos5-usbdrd: fix HS phy init count imbalance on Exynos2200
drivers/phy/samsung/phy-exynos5-usbdrd.c | 28 +++++++++++++++++++-----
1 file changed, 22 insertions(+), 6 deletions(-)
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
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2.56.0