Re: [PATCH 0/3] irqchip/gic-v3-its: Fix the ITT pool's alignment, zeroing and growth

[Marc Zyngier]

On Fri, 06 Nov 2026 09:26:22 +0000,
Fuad Tabba <fuad.tabba@xxxxxxxxx> wrote:
> 
> Hi folks,
> 
> Three fixes to the ITT pool that took over sub-page ITTs from
> kzalloc_node(). It doesn't align them to 256 bytes, though MAPD now
> relies on it to. It doesn't zero the ITTs it reuses either, and it
> leaks pages when it fails to grow.
> 
> The first gives the pool a 256-byte granule. With its 1-byte granule,
> ITTs stay aligned only while every size is a multiple of 256, which
> holds for power-of-two ITE sizes but not for QEMU's 12-byte ones. On
> QEMU, two devices with 32 MSI-X vectors each are enough to put the
> second device's ITT at an address MAPD truncates into the first's.
> 
> The second zeroes an ITT reused from the pool, as MAPD requires. The
> third frees the page when gen_pool_add() fails.

How does it relate to the series you posted right after
(20261106120221.347309-1-fuad.tabba@xxxxxxxxx)? They both deal with
all sort of zeroing and allocation requirements. So why isn't this one
single consistent series?

The scatter-gun approach you keep using is really becoming
counter-productive. I really appreciate the effort you are putting in
fixing the code, but please realise that humans are reviewing this,
not an AI. So please make it at least easy to track and keep related
things together.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.