Re: [PATCH v5 6/7] arm_mpam: Add support for memory controller MSC on DT platforms

[Yin Li]

On 11/9/2026 7:27 PM, Ping Li wrote:
> Tested-by: Ping Li <leeonion.muyu@xxxxxxxxx>


Hi Ping,

Thank you for the Tested-by — it really helps move v5 forward.

To help the maintainers evaluate this series more quickly, could you
share some additional information about your use case?

1. Your SoC or platform name (if publicly available), or a brief
   description (e.g. "server SoC with an MPAM MSC on the DDR egress
   path").
2. The typical workload scenario where memory bandwidth QoS is useful
   for you (e.g. isolating bandwidth between tenants, preventing certain
   workloads from saturating DDR, etc.).
3. Which specific features did you verify on v5? (MSC probe, resctrl
   mount, MB allocation, mbm_total_bytes monitoring, etc.)

A real usage log showing the memory controller MSC working through
resctrl would also be very helpful — similar to what we have for the
cache MSC:

```
root@qcom-armv8a:/sys/fs/resctrl# cat schemata
    L2:0=fff;65536=fff;131072=fff
root@qcom-armv8a:/sys/fs/resctrl# echo "L2:0=111;65536=222;131072=333" > 
schemata
root@qcom-armv8a:/sys/fs/resctrl# cat schemata
    L2:0=111;65536=222;131072=333
root@qcom-armv8a:/sys/fs/resctrl#
```

This would give the maintainers a clearer picture of the real-world
value of these patches and help speed up the review.

Thanks,
Yin

--
Thx and BRs,
Yin