[PATCH 6/6] ARM: tegra: Add EMC channel registers on Tegra114

From: Patrick Fischer via B4 Relay

Date: Wed Nov 11 2026 - 05:16:11 EST


From: Patrick Fischer <admin@xxxxxxxxxxxxxxxxxx>

Describe the EMC0 and EMC1 register blocks next to the broadcast
registers, so that the EMC driver can program the pad auto-calibration
of each channel.

Signed-off-by: Patrick Fischer <admin@xxxxxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/nvidia/tegra114.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
index a5958f3a965b..cf3d98274b36 100644
--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
@@ -804,7 +804,8 @@ mc: memory-controller@70019000 {

emc: external-memory-controller@7001b000 {
compatible = "nvidia,tegra114-emc";
- reg = <0x7001b000 0x800>;
+ reg = <0x7001b000 0x800>, <0x7001a000 0x800>,
+ <0x7001a800 0x800>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_EMC>;
clock-names = "emc";

--
2.56.0