[PATCH 2/2] ARM: l2c: honour status = "disabled" on the L2 cache node

[Agustin Santiago Isasmendi]

l2x0_of_init() looks the L2 cache node up by compatible and enables the
cache whatever its status property says, so a device tree cannot keep
the L2 cache off.

On the ZTE ZX279128S (dual Cortex-A9, L2C-310 r3p3) a PCIe read on one
CPU deadlocks against an L2C-310 line operation by physical address or a
Cache Sync on the other CPU, and the board hangs within seconds of WiFi
traffic.  Running with the L2 cache off avoids the deadlock, so a board
needs a way to say so.

Honour the status property, as the newer cache controller drivers
already do (drivers/cache/ax45mp_cache.c, starfive_starlink_cache.c).
If the firmware left the cache enabled, it cannot simply be ignored,
since nothing would maintain it: clean, invalidate and disable it
instead.  No in-tree L2 cache node is disabled, so nothing changes for
existing device trees.

Tested on the ZTE ZXHN H3600: with the node disabled the cache stays
off and the system runs normally; with it enabled the cache comes up as
before.  The firmware-enabled path was exercised with a test-only
change that enables the cache before the check.

Assisted-by: LLM
Signed-off-by: Agustin Santiago Isasmendi <isasmendi.agus@xxxxxxxxx>
---
 arch/arm/mm/cache-l2x0.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index eaa1fb44886e..0687e5a6ad10 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1757,6 +1757,34 @@ static const struct of_device_id l2x0_ids[] __initconst = {
 	{}
 };
 
+/*
+ * The device tree marks the cache as disabled.  Leave it off; if the
+ * firmware enabled it, clean, invalidate and disable it rather than leave
+ * it running without any cache maintenance.
+ */
+static void __init l2c_of_disabled(void __iomem *base)
+{
+	u32 cache_id, aux;
+	unsigned int sync;
+
+	if (!(readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+		pr_info("L2C: disabled by the device tree\n");
+		return;
+	}
+
+	pr_warn("L2C: disabled by the device tree but enabled by the firmware, disabling it\n");
+	cache_id = readl_relaxed(base + L2X0_CACHE_ID);
+	aux = readl_relaxed(base + L2X0_AUX_CTRL);
+	sync = (cache_id & L2X0_CACHE_ID_PART_MASK) == AURORA_CACHE_ID ?
+		AURORA_SYNC_REG : L2X0_CACHE_SYNC;
+	l2x0_way_mask = (1 << l2c_num_ways(cache_id, aux)) - 1;
+	__l2c_op_way(base + L2X0_CLEAN_INV_WAY);
+	writel_relaxed(0, base + sync);
+	l2c_wait_mask(base + sync, 1);
+	l2c_write_sec(0, base, L2X0_CTRL);
+	dsb(st);
+}
+
 int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
 	const struct l2c_init_data *data;
@@ -1779,6 +1807,13 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
 
 	l2x0_saved_regs.phy_base = res.start;
 
+	if (!of_device_is_available(np)) {
+		l2c_of_disabled(l2x0_base);
+		iounmap(l2x0_base);
+		l2x0_base = NULL;
+		return -ENODEV;
+	}
+
 	data = of_match_node(l2x0_ids, np)->data;
 
 	if (of_device_is_compatible(np, "arm,pl310-cache") &&
-- 
2.30.2