Re: [PATCH v2 1/3] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5210 SoC

[Krzysztof Kozlowski]

On Wed, Nov 11, 2026 at 02:00:55AM -0800, Luo Jie wrote:
> NSS clock controller provides the clocks and resets to the networking
> blocks such as PPE (Packet Process Engine), UNIPHY (PCS) and EPHY on
> IPQ5210 devices.
> 
> Add support for the compatible string "qcom,ipq5210-nsscc" based on the
> existing IPQ9574/IPQ5424 NSS clock controller Device Tree binding. IPQ5210
> additionally exposes a pair of EPHY-RAW Rx/Tx clock sources used to derive
> the clocks for its integrated 2.5G Ethernet PHY, so extend the clocks and
> clock-names lists with "ephy_rx" and "ephy_tx".
> 
> Also add master/slave ids for IPQ5210 networking interfaces, which are used
> by the nsscc-ipq5210 driver for providing interconnect services using the
> icc-clk framework.
> 
> Signed-off-by: Luo Jie <jie.luo@xxxxxxxxxxxxxxxx>
> ---
>  .../bindings/clock/qcom,ipq9574-nsscc.yaml         |  47 ++++++++-
>  include/dt-bindings/clock/qcom,ipq5210-nsscc.h     | 106 +++++++++++++++++++++
>  include/dt-bindings/interconnect/qcom,ipq5210.h    |  18 ++++
>  include/dt-bindings/reset/qcom,ipq5210-nsscc.h     |  60 ++++++++++++
>  4 files changed, 228 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
> index a35bbc7b1924..dc7d90a99dc7 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
> @@ -4,24 +4,28 @@
>  $id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574 and IPQ5424
> +title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ SoCs
>  
>  maintainers:
>    - Bjorn Andersson <andersson@xxxxxxxxxx>
> +  - Luo Jie <jie.luo@xxxxxxxxxxxxxxxx>
>  
>  description: |
>    Qualcomm networking sub system clock control module provides the clocks,
> -  resets on IPQ9574 and IPQ5424
> +  resets on IPQ9574, IPQ5424 and IPQ5210
>  
>    See also:
> +    include/dt-bindings/clock/qcom,ipq5210-nsscc.h
>      include/dt-bindings/clock/qcom,ipq5424-nsscc.h
>      include/dt-bindings/clock/qcom,ipq9574-nsscc.h
> +    include/dt-bindings/reset/qcom,ipq5210-nsscc.h
>      include/dt-bindings/reset/qcom,ipq5424-nsscc.h
>      include/dt-bindings/reset/qcom,ipq9574-nsscc.h
>  
>  properties:
>    compatible:
>      enum:
> +      - qcom,ipq5210-nsscc
>        - qcom,ipq5424-nsscc
>        - qcom,ipq9574-nsscc
>  
> @@ -42,6 +46,9 @@ properties:
>        - description: Uniphy2 NSS Rx clock source
>        - description: Uniphy2 NSS Tx clock source
>        - description: GCC NSSCC clock source
> +      - description: CMN_PLL EPHY-RAW Rx clock source
> +      - description: CMN_PLL EPHY-RAW Tx clock source
> +    minItems: 11

Please place minItems at the beginning, before "items:".

>  
>    '#interconnect-cells':
>      const: 1
> @@ -63,6 +70,9 @@ properties:
>        - const: uniphy2_rx
>        - const: uniphy2_tx
>        - const: bus
> +      - const: ephy_rx
> +      - const: ephy_tx
> +    minItems: 11

Same here

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>

Best regards,
Krzysztof